58 lines
1.8 KiB
Makefile
58 lines
1.8 KiB
Makefile
####################################################################################
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## Copyright 2018(c) Analog Devices, Inc.
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## Auto-generated, do not modify!
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####################################################################################
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LIBRARY_NAME := axi_dmac
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GENERIC_DEPS += ../common/ad_mem_asym.v
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GENERIC_DEPS += ../common/up_axi.v
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GENERIC_DEPS += 2d_transfer.v
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GENERIC_DEPS += address_generator.v
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GENERIC_DEPS += axi_dmac.v
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GENERIC_DEPS += axi_dmac_burst_memory.v
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GENERIC_DEPS += axi_dmac_regmap.v
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GENERIC_DEPS += axi_dmac_regmap_request.v
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GENERIC_DEPS += axi_dmac_reset_manager.v
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GENERIC_DEPS += axi_dmac_resize_dest.v
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GENERIC_DEPS += axi_dmac_resize_src.v
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GENERIC_DEPS += axi_dmac_response_manager.v
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GENERIC_DEPS += axi_dmac_transfer.v
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GENERIC_DEPS += axi_register_slice.v
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GENERIC_DEPS += data_mover.v
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GENERIC_DEPS += dest_axi_mm.v
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GENERIC_DEPS += dest_axi_stream.v
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GENERIC_DEPS += dest_fifo_inf.v
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GENERIC_DEPS += inc_id.vh
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GENERIC_DEPS += request_arb.v
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GENERIC_DEPS += request_generator.v
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GENERIC_DEPS += resp.vh
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GENERIC_DEPS += response_generator.v
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GENERIC_DEPS += response_handler.v
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GENERIC_DEPS += splitter.v
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GENERIC_DEPS += src_axi_mm.v
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GENERIC_DEPS += src_axi_stream.v
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GENERIC_DEPS += src_fifo_inf.v
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XILINX_DEPS += axi_dmac_constr.ttcl
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XILINX_DEPS += axi_dmac_ip.tcl
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XILINX_DEPS += axi_dmac_pkg_sv.ttcl
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XILINX_DEPS += bd/bd.tcl
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XILINX_DEPS += ../interfaces/fifo_rd.xml
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XILINX_DEPS += ../interfaces/fifo_rd_rtl.xml
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XILINX_DEPS += ../interfaces/fifo_wr.xml
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XILINX_DEPS += ../interfaces/fifo_wr_rtl.xml
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XILINX_LIB_DEPS += util_axis_fifo
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XILINX_LIB_DEPS += util_cdc
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INTEL_DEPS += ../util_axis_fifo/util_axis_fifo_address_generator.v
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INTEL_DEPS += ../util_axis_fifo/util_axis_fifo.v
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INTEL_DEPS += ../util_cdc/sync_bits.v
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INTEL_DEPS += ../util_cdc/sync_event.v
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INTEL_DEPS += axi_dmac_constr.sdc
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INTEL_DEPS += axi_dmac_hw.tcl
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include ../scripts/library.mk
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