55 lines
2.4 KiB
Tcl
55 lines
2.4 KiB
Tcl
# ***************************************************************************
|
|
# ***************************************************************************
|
|
# Copyright 2018 (c) Analog Devices, Inc. All rights reserved.
|
|
#
|
|
# In this HDL repository, there are many different and unique modules, consisting
|
|
# of various HDL (Verilog or VHDL) components. The individual modules are
|
|
# developed independently, and may be accompanied by separate and unique license
|
|
# terms.
|
|
#
|
|
# The user should read each of these license terms, and understand the
|
|
# freedoms and responsibilities that he or she has by using this source/core.
|
|
#
|
|
# This core is distributed in the hope that it will be useful, but WITHOUT ANY
|
|
# WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR
|
|
# A PARTICULAR PURPOSE.
|
|
#
|
|
# Redistribution and use of source or resulting binaries, with or without modification
|
|
# of this file, are permitted under one of the following two license terms:
|
|
#
|
|
# 1. The GNU General Public License version 2 as published by the
|
|
# Free Software Foundation, which can be found in the top level directory
|
|
# of this repository (LICENSE_GPL2), and also online at:
|
|
# <https://www.gnu.org/licenses/old-licenses/gpl-2.0.html>
|
|
#
|
|
# OR
|
|
#
|
|
# 2. An ADI specific BSD license, which can be found in the top level directory
|
|
# of this repository (LICENSE_ADIBSD), and also on-line at:
|
|
# https://github.com/analogdevicesinc/hdl/blob/master/LICENSE_ADIBSD
|
|
# This will allow to generate bit files and not release the source code,
|
|
# as long as it attaches to an ADI device.
|
|
#
|
|
# ***************************************************************************
|
|
# ***************************************************************************
|
|
|
|
set dac_fifo_address_width 14
|
|
|
|
source $ad_hdl_dir/projects/common/zc706/zc706_system_bd.tcl
|
|
source $ad_hdl_dir/projects/common/xilinx/dacfifo_bd.tcl
|
|
source ../common/dac_fmc_ebz_bd.tcl
|
|
source $ad_hdl_dir/projects/scripts/adi_pd.tcl
|
|
|
|
set mem_init_sys_path [get_env_param ADI_PROJECT_DIR ""]mem_init_sys.txt;
|
|
|
|
#system ID
|
|
ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
|
|
ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/$mem_init_sys_path"
|
|
ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
|
|
set ADI_DAC_DEVICE $::env(ADI_DAC_DEVICE)
|
|
set ADI_DAC_MODE $::env(ADI_DAC_MODE)
|
|
set sys_cstring "$ADI_DAC_DEVICE - $ADI_DAC_MODE"
|
|
sysid_gen_sys_init_file $sys_cstring
|
|
|
|
ad_ip_parameter dac_jesd204_link/tx CONFIG.SYSREF_IOB false
|