302 lines
12 KiB
Tcl
302 lines
12 KiB
Tcl
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create_bd_port -dir I -type rst sys_rst
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create_bd_port -dir I sys_clk_p
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create_bd_port -dir I sys_clk_n
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:ddrx_rtl:1.0 ddr3
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create_bd_port -dir O -type rst phy_rstn
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create_bd_port -dir I phy_sd
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create_bd_intf_port -mode Slave -vlnv xilinx.com:interface:diff_clock_rtl:1.0 mgt_clk
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:sgmii_rtl:1.0 sgmii
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:mdio_io:1.0 mdio
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:gpio_rtl:1.0 gpio_lcd
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:emc_rtl:1.0 linear_flash
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create_bd_intf_port -mode Master -vlnv xilinx.com:interface:iic_rtl:1.0 iic_main
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create_bd_port -dir I uart_sin
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create_bd_port -dir O uart_sout
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create_bd_port -dir O -from 7 -to 0 spi_csn_o
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create_bd_port -dir I -from 7 -to 0 spi_csn_i
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create_bd_port -dir I spi_clk_i
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create_bd_port -dir O spi_clk_o
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create_bd_port -dir I spi_sdo_i
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create_bd_port -dir O spi_sdo_o
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create_bd_port -dir I spi_sdi_i
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create_bd_port -dir I -from 31 -to 0 gpio0_i
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create_bd_port -dir O -from 31 -to 0 gpio0_o
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create_bd_port -dir O -from 31 -to 0 gpio0_t
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create_bd_port -dir I -from 31 -to 0 gpio1_i
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create_bd_port -dir O -from 31 -to 0 gpio1_o
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create_bd_port -dir O -from 31 -to 0 gpio1_t
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set_property -dict [list CONFIG.POLARITY {ACTIVE_HIGH}] [get_bd_ports sys_rst]
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# instance: microblaze - processor
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ad_ip_instance microblaze sys_mb
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ad_ip_parameter sys_mb CONFIG.G_TEMPLATE_LIST 4
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ad_ip_parameter sys_mb CONFIG.C_DCACHE_FORCE_TAG_LUTRAM 1
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# instance: microblaze - local memory & bus
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ad_ip_instance lmb_v10 sys_dlmb
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ad_ip_instance lmb_v10 sys_ilmb
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ad_ip_instance lmb_bram_if_cntlr sys_dlmb_cntlr
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ad_ip_parameter sys_dlmb_cntlr CONFIG.C_ECC 0
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ad_ip_instance lmb_bram_if_cntlr sys_ilmb_cntlr
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ad_ip_parameter sys_ilmb_cntlr CONFIG.C_ECC 0
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ad_ip_instance blk_mem_gen sys_lmb_bram
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ad_ip_parameter sys_lmb_bram CONFIG.Memory_Type True_Dual_Port_RAM
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ad_ip_parameter sys_lmb_bram CONFIG.use_bram_block BRAM_Controller
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# instance: microblaze- mdm
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ad_ip_instance mdm sys_mb_debug
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ad_ip_parameter sys_mb_debug CONFIG.C_USE_UART 1
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# instance: system reset/clocks
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ad_ip_instance proc_sys_reset sys_rstgen
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ad_ip_parameter sys_rstgen CONFIG.C_EXT_RST_WIDTH 1
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ad_ip_instance proc_sys_reset sys_200m_rstgen
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ad_ip_parameter sys_200m_rstgen CONFIG.C_EXT_RST_WIDTH 1
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# instance: ddr (mig)
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ad_ip_instance mig_7series axi_ddr_cntrl
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set axi_ddr_cntrl_dir [get_property IP_DIR [get_ips [get_property CONFIG.Component_Name [get_bd_cells axi_ddr_cntrl]]]]
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file copy -force $ad_hdl_dir/projects/common/vc707/vc707_system_mig.prj "$axi_ddr_cntrl_dir/"
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ad_ip_parameter axi_ddr_cntrl CONFIG.XML_INPUT_FILE vc707_system_mig.prj
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ad_ip_parameter axi_ddr_cntrl CONFIG.RESET_BOARD_INTERFACE Custom
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# instance: default peripherals
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ad_ip_instance axi_ethernet axi_ethernet
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ad_ip_parameter axi_ethernet CONFIG.PHY_TYPE SGMII
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ad_ip_parameter axi_ethernet CONFIG.TXCSUM Full
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ad_ip_parameter axi_ethernet CONFIG.RXCSUM Full
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ad_ip_parameter axi_ethernet CONFIG.TXMEM 8k
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ad_ip_parameter axi_ethernet CONFIG.RXMEM 8k
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ad_ip_instance axi_dma axi_ethernet_dma
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ad_ip_parameter axi_ethernet_dma CONFIG.c_include_mm2s_dre 1
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ad_ip_parameter axi_ethernet_dma CONFIG.c_sg_use_stsapp_length 1
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ad_ip_parameter axi_ethernet_dma CONFIG.c_include_s2mm_dre 1
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ad_ip_instance axi_iic axi_iic_main
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ad_ip_instance axi_uartlite axi_uart
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ad_ip_parameter axi_uart CONFIG.C_BAUDRATE 115200
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ad_ip_instance axi_timer axi_timer
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ad_ip_instance axi_gpio axi_gpio_lcd
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ad_ip_parameter axi_gpio_lcd CONFIG.C_GPIO_WIDTH 7
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ad_ip_parameter axi_gpio_lcd CONFIG.C_INTERRUPT_PRESENT 1
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ad_ip_instance axi_quad_spi axi_spi
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ad_ip_parameter axi_spi CONFIG.C_USE_STARTUP 0
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ad_ip_parameter axi_spi CONFIG.C_NUM_SS_BITS 8
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ad_ip_parameter axi_spi CONFIG.C_SCK_RATIO 8
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ad_ip_instance axi_gpio axi_gpio
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ad_ip_parameter axi_gpio CONFIG.C_IS_DUAL 1
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ad_ip_parameter axi_gpio CONFIG.C_GPIO_WIDTH 32
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ad_ip_parameter axi_gpio CONFIG.C_GPIO2_WIDTH 32
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ad_ip_parameter axi_gpio CONFIG.C_INTERRUPT_PRESENT 1
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# instance: interrupt
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ad_ip_instance axi_intc axi_intc
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ad_ip_parameter axi_intc CONFIG.C_HAS_FAST 0
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ad_ip_instance xlconcat sys_concat_intc
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ad_ip_parameter sys_concat_intc CONFIG.NUM_PORTS 16
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# linear flash
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ad_ip_instance axi_emc axi_linear_flash
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ad_ip_parameter axi_linear_flash CONFIG.USE_BOARD_FLOW true
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ad_ip_parameter axi_linear_flash CONFIG.EMC_BOARD_INTERFACE linear_flash
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ad_ip_parameter axi_linear_flash CONFIG.C_MEM0_TYPE 2
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ad_ip_parameter axi_linear_flash CONFIG.C_S_AXI_MEM_ID_WIDTH 0
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ad_ip_parameter axi_linear_flash CONFIG.C_THZCE_PS_MEM_0 7000
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ad_ip_parameter axi_linear_flash CONFIG.C_TLZWE_PS_MEM_0 0
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ad_ip_parameter axi_linear_flash CONFIG.C_TWC_PS_MEM_0 15000
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ad_ip_parameter axi_linear_flash CONFIG.C_WR_REC_TIME_MEM_0 0
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ad_ip_parameter axi_linear_flash CONFIG.C_TWP_PS_MEM_0 40000
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ad_ip_parameter axi_linear_flash CONFIG.C_TWPH_PS_MEM_0 20000
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ad_ip_parameter axi_linear_flash CONFIG.C_TPACC_PS_FLASH_0 15000
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ad_ip_parameter axi_linear_flash CONFIG.C_TCEDV_PS_MEM_0 96000
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ad_ip_parameter axi_linear_flash CONFIG.C_TAVDV_PS_MEM_0 96000
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# connections
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ad_connect sys_mb_debug/Debug_SYS_Rst sys_rstgen/mb_debug_sys_rst
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ad_connect sys_rstgen/mb_reset sys_mb/Reset
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ad_connect sys_rstgen/bus_struct_reset sys_dlmb/SYS_Rst
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ad_connect sys_rstgen/bus_struct_reset sys_ilmb/SYS_Rst
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ad_connect sys_rstgen/bus_struct_reset sys_dlmb_cntlr/LMB_Rst
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ad_connect sys_rstgen/bus_struct_reset sys_ilmb_cntlr/LMB_Rst
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# microblaze local memory
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ad_connect sys_dlmb/LMB_Sl_0 sys_dlmb_cntlr/SLMB
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ad_connect sys_ilmb/LMB_Sl_0 sys_ilmb_cntlr/SLMB
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ad_connect sys_dlmb_cntlr/BRAM_PORT sys_lmb_bram/BRAM_PORTA
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ad_connect sys_ilmb_cntlr/BRAM_PORT sys_lmb_bram/BRAM_PORTB
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ad_connect sys_mb/DLMB sys_dlmb/LMB_M
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ad_connect sys_mb/ILMB sys_ilmb/LMB_M
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# microblaze debug & interrupt
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ad_connect sys_mb_debug/MBDEBUG_0 sys_mb/DEBUG
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ad_connect axi_intc/interrupt sys_mb/INTERRUPT
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ad_connect sys_concat_intc/dout axi_intc/intr
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# defaults (peripherals)
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ad_connect axi_ddr_cntrl/device_temp_i GND
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ad_connect axi_ddr_cntrl/mmcm_locked sys_rstgen/dcm_locked
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ad_connect axi_ddr_cntrl/mmcm_locked sys_200m_rstgen/dcm_locked
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ad_connect sys_cpu_clk axi_ddr_cntrl/ui_addn_clk_0
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ad_connect sys_200m_clk axi_ddr_cntrl/ui_clk
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ad_connect sys_cpu_resetn axi_ddr_cntrl/aresetn
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ad_connect sys_cpu_reset sys_rstgen/peripheral_reset
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ad_connect sys_cpu_resetn sys_rstgen/peripheral_aresetn
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ad_connect sys_200m_reset sys_200m_rstgen/peripheral_reset
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ad_connect sys_200m_resetn sys_200m_rstgen/peripheral_aresetn
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# generic system clocks pointers
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set sys_cpu_clk [get_bd_nets sys_cpu_clk]
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set sys_dma_clk [get_bd_nets sys_200m_clk]
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set sys_iodelay_clk [get_bd_nets sys_200m_clk]
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set sys_cpu_reset [get_bd_nets sys_cpu_reset]
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set sys_cpu_resetn [get_bd_nets sys_cpu_resetn]
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set sys_dma_reset [get_bd_nets sys_200m_reset]
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set sys_dma_resetn [get_bd_nets sys_200m_resetn]
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set sys_iodelay_reset [get_bd_nets sys_200m_reset]
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set sys_iodelay_resetn [get_bd_nets sys_200m_resetn]
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ad_connect sys_cpu_clk sys_rstgen/slowest_sync_clk
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ad_connect sys_200m_clk sys_200m_rstgen/slowest_sync_clk
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ad_connect sys_cpu_clk sys_mb/Clk
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ad_connect sys_cpu_clk sys_dlmb/LMB_Clk
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ad_connect sys_cpu_clk sys_ilmb/LMB_Clk
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ad_connect sys_cpu_clk sys_dlmb_cntlr/LMB_Clk
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ad_connect sys_cpu_clk sys_ilmb_cntlr/LMB_Clk
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ad_connect sys_cpu_clk axi_spi/ext_spi_clk
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# defaults (interrupts)
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ad_connect sys_concat_intc/In0 axi_timer/interrupt
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ad_connect sys_concat_intc/In1 axi_ethernet/interrupt
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ad_connect sys_concat_intc/In2 axi_ethernet_dma/mm2s_introut
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ad_connect sys_concat_intc/In3 axi_ethernet_dma/s2mm_introut
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ad_connect sys_concat_intc/In4 axi_uart/interrupt
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ad_connect sys_concat_intc/In5 axi_gpio_lcd/ip2intc_irpt
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ad_connect sys_concat_intc/In6 GND
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ad_connect sys_concat_intc/In7 GND
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ad_connect sys_concat_intc/In8 GND
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ad_connect sys_concat_intc/In9 axi_iic_main/iic2intc_irpt
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ad_connect sys_concat_intc/In10 axi_spi/ip2intc_irpt
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ad_connect sys_concat_intc/In11 axi_gpio/ip2intc_irpt
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ad_connect sys_concat_intc/In12 GND
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ad_connect sys_concat_intc/In13 GND
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ad_connect sys_concat_intc/In14 GND
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ad_connect sys_concat_intc/In15 GND
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# defaults (external interface)
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ad_connect sys_rst sys_rstgen/ext_reset_in
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ad_connect sys_rst axi_ddr_cntrl/sys_rst
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ad_connect sys_200m_rst sys_200m_rstgen/ext_reset_in
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ad_connect sys_200m_rst axi_ddr_cntrl/ui_clk_sync_rst
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ad_connect sys_clk_p axi_ddr_cntrl/sys_clk_p
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ad_connect sys_clk_n axi_ddr_cntrl/sys_clk_n
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ad_connect ddr3 axi_ddr_cntrl/DDR3
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ad_connect sys_200m_clk axi_ethernet/ref_clk
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ad_connect sys_cpu_clk axi_ethernet/axis_clk
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ad_connect phy_sd axi_ethernet/signal_detect
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ad_connect phy_rstn axi_ethernet/phy_rst_n
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ad_connect mgt_clk axi_ethernet/mgt_clk
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ad_connect mdio axi_ethernet/mdio
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ad_connect sgmii axi_ethernet/sgmii
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ad_connect sys_cpu_clk axi_ethernet_dma/m_axi_sg_aclk
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ad_connect sys_cpu_clk axi_ethernet_dma/m_axi_mm2s_aclk
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ad_connect sys_cpu_clk axi_ethernet_dma/m_axi_s2mm_aclk
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ad_connect axi_ethernet/axi_txd_arstn axi_ethernet_dma/mm2s_prmry_reset_out_n
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ad_connect axi_ethernet/axi_txc_arstn axi_ethernet_dma/mm2s_cntrl_reset_out_n
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ad_connect axi_ethernet/axi_rxd_arstn axi_ethernet_dma/s2mm_prmry_reset_out_n
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ad_connect axi_ethernet/axi_rxs_arstn axi_ethernet_dma/s2mm_sts_reset_out_n
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ad_connect axi_ethernet/s_axis_txd axi_ethernet_dma/M_AXIS_MM2S
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ad_connect axi_ethernet/s_axis_txc axi_ethernet_dma/M_AXIS_CNTRL
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ad_connect axi_ethernet/m_axis_rxd axi_ethernet_dma/S_AXIS_S2MM
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ad_connect axi_ethernet/m_axis_rxs axi_ethernet_dma/S_AXIS_STS
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ad_connect uart_sin axi_uart/rx
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ad_connect uart_sout axi_uart/tx
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ad_connect gpio_lcd axi_gpio_lcd/gpio
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ad_connect iic_main axi_iic_main/iic
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ad_connect spi_csn_i axi_spi/ss_i
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ad_connect spi_csn_o axi_spi/ss_o
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ad_connect spi_clk_i axi_spi/sck_i
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ad_connect spi_clk_o axi_spi/sck_o
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ad_connect spi_sdo_i axi_spi/io0_i
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ad_connect spi_sdo_o axi_spi/io0_o
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ad_connect spi_sdi_i axi_spi/io1_i
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ad_connect gpio0_i axi_gpio/gpio_io_i
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ad_connect gpio0_o axi_gpio/gpio_io_o
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ad_connect gpio0_t axi_gpio/gpio_io_t
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ad_connect gpio1_i axi_gpio/gpio2_io_i
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ad_connect gpio1_o axi_gpio/gpio2_io_o
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ad_connect gpio1_t axi_gpio/gpio2_io_t
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# linear_flash
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ad_connect axi_linear_flash/EMC_INTF linear_flash
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ad_connect sys_cpu_resetn axi_linear_flash/s_axi_aresetn
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ad_connect sys_cpu_clk axi_linear_flash/s_axi_aclk
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ad_connect sys_cpu_clk axi_linear_flash/rdclk
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# address mapping
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ad_cpu_interconnect 0x41400000 sys_mb_debug
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ad_cpu_interconnect 0x40E00000 axi_ethernet
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ad_cpu_interconnect 0x40010000 axi_gpio_lcd
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ad_cpu_interconnect 0x41E10000 axi_ethernet_dma
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ad_cpu_interconnect 0x41200000 axi_intc
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ad_cpu_interconnect 0x41C00000 axi_timer
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ad_cpu_interconnect 0x40600000 axi_uart
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ad_cpu_interconnect 0x41600000 axi_iic_main
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ad_cpu_interconnect 0x40000000 axi_gpio
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ad_cpu_interconnect 0x44A70000 axi_spi
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ad_cpu_interconnect 0x60000000 axi_linear_flash
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ad_mem_hp0_interconnect sys_200m_clk axi_ddr_cntrl/S_AXI
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ad_mem_hp0_interconnect sys_cpu_clk sys_mb/M_AXI_DC
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ad_mem_hp0_interconnect sys_cpu_clk sys_mb/M_AXI_IC
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ad_mem_hp0_interconnect sys_cpu_clk axi_ethernet_dma/M_AXI_SG
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ad_mem_hp0_interconnect sys_cpu_clk axi_ethernet_dma/M_AXI_MM2S
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ad_mem_hp0_interconnect sys_cpu_clk axi_ethernet_dma/M_AXI_S2MM
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create_bd_addr_seg -range 0x80000 -offset 0x0 [get_bd_addr_spaces sys_mb/Data] \
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[get_bd_addr_segs sys_dlmb_cntlr/SLMB/Mem] SEG_dlmb_cntlr
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create_bd_addr_seg -range 0x80000 -offset 0x0 [get_bd_addr_spaces sys_mb/Instruction] \
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[get_bd_addr_segs sys_ilmb_cntlr/SLMB/Mem] SEG_ilmb_cntlr
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set_property range 0x2000000 [get_bd_addr_segs {sys_mb/Data/SEG_data_axi_linear_flash}]
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