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Istvan Csomortani 318dcbb5d9 adrv9371x: Set up the defualt clock output control 
The TX side runs on QPLL, and the RX and RX_OS runs on CPLL by default.
The OUTCLK frequency is the same as the REFCLK.

The main reason of this modification is that the links should come up
without any DPR access, after power up, using the default reference clock
configuration (122.88 MHz).
 		2018-04-11 15:09:54 +03:00
library util_axis_fifo: instantiate block ram in async mode 2018-04-11 15:09:54 +03:00
projects adrv9371x: Set up the defualt clock output control 2018-04-11 15:09:54 +03:00
.gitattributes Update .gitattributes 2016-02-12 14:27:35 +02:00
.gitignore Update .gitignore 2016-12-19 15:37:05 +00:00
LICENSE license: GPL must be GPL v2 2017-05-31 18:18:45 +03:00
LICENSE_ADIBSD license: Add top level license files 2017-05-29 09:57:39 +03:00
LICENSE_GPL2 license: Add top level license files 2017-05-29 09:57:39 +03:00
LICENSE_LGPL license: Add top level license files 2017-05-29 09:57:39 +03:00
Makefile Make: Use $(MAKE) for recursive make commands 2018-03-07 07:40:19 +00:00
README.md README: Remove the Documentation section, it's redundant 2018-03-07 12:28:40 +00:00

README.md

HDL Reference Designs

Analog Devices Inc. HDL libraries and projects.

Getting started

This repository supports reference designs for different Analog Devices boards based on Intel and Xilinx FPGA development boards or standalone.

Prerequisites

or

Please make sure that you have the required tool version.

How to build a project

For building a projects, you have to use the GNU Make tool. If you're a Windows user please checkout this page, to see how you can install this tool.

To build a project, checkout the latest release, after that just cd to the project that you want to build and run make:

 [~]cd projects/fmcomms2/zc706
 [~]make

A more comprehensive build guide can be found under the following link: https://wiki.analog.com/resources/fpga/docs/build

Software

In general all the projects have no-OS (baremetal) and a Linux support. See no-OS or Linux for more information.

Which branch should I use?

  • If you want to use the most stable code base, always use the latest release branch.

  • If you want to use the greatest and latest, check out the master branch.

License

In this HDL repository, there are many different and unique modules, consisting of various HDL (Verilog or VHDL) components. The individual modules are developed independently, and may be accompanied by separate and unique license terms.

The user should read each of these license terms, and understand the freedoms and responsibilities that he or she has by using this source/core.

See LICENSE for more details. The separate license files cab be found here:

Comprehensive user guide

See HDL User Guide for a more detailed guide.

Support

Feel free to ask any question at EngineerZone.