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Lars-Peter Clausen b20714bae2 Regenerate project top-level Makefiles 
Removes a lot of boilerplate code.

Using the new scheme it is possible to add new projects or sub-projects
without having to re-generate any existing Makefiles.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2018-04-11 15:09:54 +03:00
..
ccbob_cmos Regenerate project Makefiles using the new shared Makefile includes 2018-04-11 15:09:54 +03:00
ccbob_lvds Regenerate project Makefiles using the new shared Makefile includes 2018-04-11 15:09:54 +03:00
ccbox_lvds Regenerate project Makefiles using the new shared Makefile includes 2018-04-11 15:09:54 +03:00
ccfmc_lvds Regenerate project Makefiles using the new shared Makefile includes 2018-04-11 15:09:54 +03:00
ccpci_lvds Regenerate project Makefiles using the new shared Makefile includes 2018-04-11 15:09:54 +03:00
ccusb_lvds Regenerate project Makefiles using the new shared Makefile includes 2018-04-11 15:09:54 +03:00
common adrv936x: Fix Ethernet 2018-04-11 15:09:54 +03:00
Makefile Regenerate project top-level Makefiles 2018-04-11 15:09:54 +03:00
README.md adrv936x- readme updates 2017-08-08 15:18:43 -04:00

README.md

ADRV9361Z7035 SDR SOM

This folder contains the ADRV9361Z7035 SOM projects for each of the carrier boards.

Supported SOM & Carriers

Directory Description
ccbob_cmos ADRV9361Z7035-SOM (CMOS Mode) + ADRV1CRR-BOB
ccbob_lvds ADRV9361Z7035-SOM (LVDS Mode) + ADRV1CRR-BOB
ccbox_lvds ADRV9361Z7035-SOM (LVDS Mode) + ADRV1CRR-BOX
ccfmc_lvds ADRV9361Z7035-SOM (LVDS Mode) + ADRV1CRR-FMC
ccpci_lvds ADRV9361Z7035-SOM (LVDS Mode) + ADRV1CRR-PCI
ccusb_lvds ADRV9361Z7035-SOM (LVDS Mode) + ADRV1CRR-USB

Board Design Files (Vivado IPI)

Directory/File Description
common/adrv9361z7035_bd.tcl ADRV9361Z7035-SOM board design file.
common/ccbob_bd.tcl carrier, break out board design file.
common/ccbox_bd.tcl carrier, box board design file.
common/ccfmc_bd.tcl carrier, fmc board design file.
common/ccpci_bd.tcl carrier, pci-e board design file.
common/ccusb_bd.tcl carrier, usb board design file.

FMC & BOB carrier designs includes loopback daughtercards for connectivity testing.

Board Constraint Files (pin-out & io-standard)

Directory/File Description
common/adrv9361z7035_constr.xdc ADRV9361Z7035-SOM base constraints file.
common/adrv9361z7035_constr_cmos.xdc ADRV9361Z7035-SOM CMOS mode constraints file.
common/adrv9361z7035_constr_lvds.xdc ADRV9361Z7035-SOM LVDS mode constraints file.
common/ccbob_constr.xdc carrier, break out board constraints file.
common/ccbox_constr.xdc carrier, box board constraints file.
common/ccfmc_constr.xdc carrier, fmc board constraints file.
common/ccpci_constr.xdc carrier, pci-e board constraints file.
common/ccusb_constr.xdc carrier, usb board constraints file.

FMC & BOB carrier designs includes loopback daughtercards for connectivity testing.

Building, Generating Bit Files (easy & efficient method)

[some-directory]> git clone -b dev git@github.com:analogdevicesinc/hdl.git
[some-directory]> make -C hdl/projects/adrv9361z7035/ccbob_cmos

Building, Generating Elf Files (easy & efficient method)

[some-directory]> git clone -b dev git@github.com:analogdevicesinc/no-OS.git
[some-directory]> make -C no-OS/adrv9361z7035/ccbob_cmos

Running, a quick test (easy & efficient method)

[some-directory]> make -C no-OS/adrv9361z7035/ccbob_cmos run

Documentation