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AndreiGrozav 6f52ddb2c7 adrv936x: Fix Ethernet 
Explicitly select MIO 52 and 53 pins to be part of MDIO port.
MIO_52_PIN (MDIO 0 Clock, Output)
MIO_53_PIN (MDIO 0 Data, Input/Output)
After the tool version change, this pins where by default connected
as MIO GPIOs.
 		2018-04-11 15:09:54 +03:00
..
adrv9364z7020_bd.tcl adrv936x: Fix Ethernet 2018-04-11 15:09:54 +03:00
adrv9364z7020_constr.xdc adrv9364z7020- fix enable/en_agc mixup 2017-06-05 16:06:27 -04:00
adrv9364z7020_constr_cmos.xdc adrv9364z7020: Rename pzsdr1 to adrv9364z7020 2017-05-25 17:20:23 +03:00
adrv9364z7020_constr_lvds.xdc adrv9364z7020: Rename pzsdr1 to adrv9364z7020 2017-05-25 17:20:23 +03:00
ccbob_bd.tcl adrv9364z7020: Rename pzsdr1 to adrv9364z7020 2017-05-25 17:20:23 +03:00
ccbob_constr.xdc adrv9364z7020: Rename pzsdr1 to adrv9364z7020 2017-05-25 17:20:23 +03:00
ccbox_bd.tcl axi_ad9361: Update the PPS receiver module 2017-08-02 16:38:23 +01:00
ccbox_constr.xdc adrv9364/ccbox- input rf protection 2017-08-25 13:30:46 -04:00
ccusb_bd.tcl adrv9364z7020: Rename pzsdr1 to adrv9364z7020 2017-05-25 17:20:23 +03:00
ccusb_constr.xdc adrv9364z7020: Rename pzsdr1 to adrv9364z7020 2017-05-25 17:20:23 +03:00