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Laszlo Nagy 4026eaa19b ad9081_fmca_ebz: Fix device clocks termination 
The device clocks are AC coupled LVDS lines without external termination.
For proper operation internal differential termination must be enabled,
the DQS_BIAS will DC bias the AC coupled signal to VCCO/2 (1.8/2) 0.9V
 		2020-10-06 16:13:21 +03:00
..
common ad9081_fmca_ebz: adapt to renamed tpl core 2020-05-20 19:08:25 +03:00
vcu118 ad9081_fmca_ebz: Fix device clocks termination 2020-10-06 16:13:21 +03:00
zcu102 ad9081_fmca_ebz: Fix device clocks termination 2020-10-06 16:13:21 +03:00
Makefile ad9081_fmca_ebz: common block design 2020-03-10 18:19:03 +02:00