pluto_hdl_adi/projects
Rejeesh Kutty 360e7104b6 dmafifo: axi version- heavy duty 2014-10-30 11:12:12 -04:00
..
ad9265_fmc ad9265: Initial commit 2014-09-23 22:51:42 -04:00
ad9434_fmc ad9434_fmc: Fix PN monitor and device interrupt 2014-10-23 11:29:14 +03:00
ad9467_fmc all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
ad9625_fmc daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal 2014-10-29 18:15:54 +01:00
ad9625x2_fmc all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
ad9671_fmc ad9671: Fixed constraints. Modified system_timing.tcl so that it will fail if timing are not met 2014-10-29 18:25:56 +02:00
ad9680_eval all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
adv7511 adv7511: Update interrupts. 2014-10-27 19:48:05 +02:00
common dmafifo: axi version- heavy duty 2014-10-30 11:12:12 -04:00
daq1 all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
daq2 Merge branch 'dev' of https://github.com/analogdevicesinc/hdl into dev 2014-10-30 08:42:09 +01:00
daq3 daq2/daq3/ad9625_fmc: Connect ADC DMA xfer_req signal 2014-10-29 18:15:54 +01:00
fmcadc3 fmcadc3: 16bit - but ignored 4 lsb(s) 2014-09-29 15:26:30 -04:00
fmcjesdadc1 all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
fmcomms1 all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
fmcomms2 fmcomms2: updated zc706 project with new constraint style 2014-10-27 19:27:36 +02:00
fmcomms2_pr fmcomms2_pr: Fix file path on ZC706/system_bd.tcl 2014-09-01 18:49:55 +03:00
fmcomms5 all_projects: Fix the interrupt connections to preserve IRQ layout 2014-10-22 11:48:08 +03:00
fmcomms6 fmcomms6: Avoiding redefinition of system clocks. 2014-10-23 12:55:56 +03:00
motor_control Remove executable flags from non-exectuable files 2014-09-09 15:05:06 +02:00
pmods ad7175: Fix dma issues 2014-10-28 16:00:06 +02:00
scripts scripts: add default memory interconnect 2014-10-27 15:53:20 -04:00
usdrx1 usdrx1: Added synchronization, updated constraints, added timing check for a5gt project 2014-10-29 19:29:42 +02:00