36febf8591
Conflicts: library/axi_ad9361/axi_ad9361_ip.tcl library/axi_dmac/Makefile library/axi_dmac/axi_dmac_constr.ttcl library/axi_dmac/axi_dmac_ip.tcl library/common/ad_tdd_control.v projects/daq2/common/daq2_bd.tcl projects/fmcjesdadc1/common/fmcjesdadc1_bd.tcl projects/fmcomms2/zc706pr/system_project.tcl projects/fmcomms2/zc706pr/system_top.v projects/usdrx1/common/usdrx1_bd.tcl This merge was made, to recover any forgotten fixes from master, before creating the new release branch. All conflicts were reviewed and resolved. |
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README.md
#HDL Reference Designs
Analog Devices HDL libraries and projects
###Tools version:
- Xilinx : Vivado 2015.2.1
- Altera : Quartus 15.0
###Documentation and support
For first time users, it is highly recommended to go through our HDL user guide.
For support please visit our FPGA Reference Designs Support Community on EngineerZone.