pluto_hdl_adi/library/axi_ad9122
Lars-Peter Clausen de4fe30238 library: Match s_axi_{awaddr,araddr} signal width to peripheral memory map size
The external s_axi_{awaddr,araddr} signals that are connect to the core
have their width set according to the specified size of the register map.

If the s_axi_{awaddr,araddr} signal of the core is wider (as it currently
is for many cores) the MSBs of those signals are left unconnected, which
generates a warning.

To avoid this make sure that the signal width matches the declared register
map size.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-08-01 15:21:25 +02:00
..
Makefile hdlmake updates 2017-04-25 15:46:26 -04:00
axi_ad9122.v library: Match s_axi_{awaddr,araddr} signal width to peripheral memory map size 2017-08-01 15:21:25 +02:00
axi_ad9122_channel.v license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
axi_ad9122_constr.sdc library/ad9122- constraints clean-up 2017-02-02 14:21:41 -05:00
axi_ad9122_constr.xdc library/ad9122- constraints clean-up 2017-02-02 14:21:41 -05:00
axi_ad9122_core.v license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
axi_ad9122_hw.tcl constraints: Split the regmap CDC constraint into separate file 2017-05-25 15:12:16 +03:00
axi_ad9122_if.v license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
axi_ad9122_ip.tcl library: Delete all adi_ip_constraint process call 2017-04-06 12:36:47 +03:00