Adrian Costina c32b4b02f3 sync_bits: Change I/O names of wires "in" and "out" for VHDL users		2019-04-23 18:03:23 +03:00
..
Makefile	Move Altera IP core dependency tracking to library Makefiles	2018-04-11 15:09:54 +03:00
axi_ad5766.v	sync_bits: Change I/O names of wires "in" and "out" for VHDL users	2019-04-23 18:03:23 +03:00
axi_ad5766_ip.tcl	library: Update scripts/adi_ad_ip.tcl and IPs	2019-04-09 16:07:14 +03:00
up_ad5766_sequencer.v	license: Fix a spelling mistake	2018-04-11 15:09:54 +03:00