Lars-Peter Clausen d72fac4b1e Add missing timescale annotations ... For consistent simulation behavior it is recommended to annotate all source files with a timescale. Add it to those where it is currently missing. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>		2018-10-17 10:32:47 +03:00
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bd	axi_clkgen: Propagate clock settings to output pins	2017-04-20 20:36:33 +02:00
Makefile	library: Remove empty constraint files	2018-04-11 15:09:54 +03:00
axi_clkgen.v	Add missing timescale annotations	2018-10-17 10:32:47 +03:00
axi_clkgen_ip.tcl	adi_ip: Use 'associate_bus_interface' command to setup the clock and reset for s_axi	2018-08-06 10:14:48 +03:00