30 lines
1.1 KiB
Tcl
30 lines
1.1 KiB
Tcl
###############################################################################
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## Copyright (C) 2014-2023 Analog Devices, Inc. All rights reserved.
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### SPDX short identifier: ADIBSD
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###############################################################################
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source $ad_hdl_dir/projects/common/zc702/zc702_system_bd.tcl
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source $ad_hdl_dir/projects/scripts/adi_pd.tcl
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set mem_init_sys_path [get_env_param ADI_PROJECT_DIR ""]mem_init_sys.txt;
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#system ID
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ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
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ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/$mem_init_sys_path"
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ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
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sysid_gen_sys_init_file
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ad_ip_parameter sys_ps7 CONFIG.PCW_EN_CLK2_PORT 1
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ad_ip_parameter sys_ps7 CONFIG.PCW_FPGA2_PERIPHERAL_FREQMHZ 150.0
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ad_connect sys_dma_clk sys_ps7/FCLK_CLK2
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set sys_dma_clk [get_bd_nets sys_dma_clk]
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source ../common/fmcomms5_bd.tcl
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ad_ip_parameter axi_ad9361_0 CONFIG.ADC_INIT_DELAY 24
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ad_ip_parameter axi_ad9361_1 CONFIG.ADC_INIT_DELAY 24
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ad_ip_parameter axi_ad9361_adc_dma CONFIG.AXI_SLICE_DEST 1
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ad_ip_parameter axi_ad9361_dac_dma CONFIG.AXI_SLICE_SRC 1
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