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Lars-Peter Clausen 77631c8717 axi_ad9250: Use the generic JESD204 ADC receiver core 
Replace the axi_ad9250 implementation with the new generic JESD204
interface ADC core. The replacement is functionally equivalent, except that
the converter clock ratio is now correctly reported as 2 rather than 1 as
before.

Also the adc_rst output port is removed. It is not used in any design. The
current guidelines for the reset for the JESD204 subsystem is to use an
external reset generator.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2018-05-02 17:21:20 +02:00
..
Makefile axi_ad9250: Use the generic JESD204 ADC receiver core 2018-05-02 17:21:20 +02:00
axi_ad9250.v axi_ad9250: Use the generic JESD204 ADC receiver core 2018-05-02 17:21:20 +02:00
axi_ad9250_hw.tcl axi_ad9250: Use the generic JESD204 ADC receiver core 2018-05-02 17:21:20 +02:00
axi_ad9250_ip.tcl axi_ad9250: Use the generic JESD204 ADC receiver core 2018-05-02 17:21:20 +02:00