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axi_ad6676
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ad6676: added
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2014-11-10 13:36:07 -05:00 |
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axi_ad7175
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ad7175: Fix dma issues
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2014-10-28 16:00:06 +02:00 |
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axi_ad9122
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axi_ad9122: Added constraint file
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2014-10-31 17:56:56 +02:00 |
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axi_ad9144
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axi_ad9144: added constraints
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2014-10-17 13:57:09 -04:00 |
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axi_ad9152
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ip: constraint changes
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2014-10-15 14:50:58 -04:00 |
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axi_ad9234
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ad9234: full 16bit samples
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2014-11-05 11:59:08 -05:00 |
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axi_ad9250
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up/constr: independent read/write and local constraints
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2014-10-02 14:35:59 -04:00 |
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axi_ad9265
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axi_ad9265: Updated project with new up independent read/write
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2014-10-03 12:32:08 +03:00 |
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axi_ad9361
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axi_ad9361: Updated core with the new up_adc_common register set
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2014-10-27 19:26:40 +02:00 |
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axi_ad9434
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ad9434_fmc: Fix PN monitor and device interrupt
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2014-10-23 11:29:14 +03:00 |
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axi_ad9467
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axi_ad9467: Independent read/write update
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2014-10-08 11:23:44 +03:00 |
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axi_ad9625
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axi_ad9625: added constraints
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2014-10-17 13:57:30 -04:00 |
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axi_ad9643
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axi_ad9643: Added constraint file
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2014-10-31 17:57:47 +02:00 |
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axi_ad9652
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up/constr: independent read/write and local constraints
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2014-10-02 14:35:59 -04:00 |
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axi_ad9671
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axi_ad9671: added synchronization interface to altera core
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2014-10-29 18:20:26 +02:00 |
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axi_ad9680
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ip: constraint changes
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2014-10-15 14:50:58 -04:00 |
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axi_clkgen
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up/constr: independent read/write and local constraints
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2014-10-02 14:35:59 -04:00 |
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axi_dmac
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axi_dmac: Add xfer_req signal to the streamin AXI source interface
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2014-10-29 18:15:54 +01:00 |
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axi_fifo
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axi_dmac/axi_fifo: Add missing file
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2014-09-15 21:04:57 +02:00 |
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axi_fifo2f
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axi_fifo2f: internal memory low overhead
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2014-10-30 11:12:10 -04:00 |
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axi_fifo2s
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ip: constraint changes
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2014-10-15 14:50:58 -04:00 |
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axi_hdmi_tx
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ip: constraint changes
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2014-10-15 14:50:58 -04:00 |
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axi_i2s_adi
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axi_i2s: Add missing signals to the regmap read process sensitivity list
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2014-10-10 16:25:56 +03:00 |
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axi_jesd_gt
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gt: asymmetric no of lanes
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2014-11-11 08:54:24 -05:00 |
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axi_mc_controller
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Remove BASEADDR/HIGHADDR parameters
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2014-09-11 12:26:37 +02:00 |
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axi_mc_current_monitor
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Remove BASEADDR/HIGHADDR parameters
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2014-09-11 12:26:37 +02:00 |
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axi_mc_speed
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Remove BASEADDR/HIGHADDR parameters
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2014-09-11 12:26:37 +02:00 |
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axi_spdif_tx
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axi_spdif: Add missing signals to the regmap read sensitifity list
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2014-10-10 16:26:09 +03:00 |
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common
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Revert "ad_interrupts: Initial check in."
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2014-11-06 12:16:52 +02:00 |
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controllerperipheralhdladi_pcore
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motor_control: Updated the FOC IP
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2014-09-08 15:52:18 +03:00 |
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ip_pid_controller
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Remove executable flags from non-exectuable files
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2014-09-09 15:05:06 +02:00 |
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prcfg
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prcfg_qpsk: Swap the I/Q pair nets between the filter and the demodulator.
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2014-10-31 12:14:52 +02:00 |
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scripts
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scripts/adi_ip: Add helper function to create bus clock and reset interface
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2014-10-10 16:11:31 +03:00 |
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util_adc_pack
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util_adc_pack: removed latches
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2014-10-17 15:40:16 +03:00 |
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util_dac_unpack
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util_dac_unpack: Fix unpack order with 1 channel
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2014-10-10 16:26:14 +03:00 |
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util_i2c_mixer
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pointers to directories
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2014-02-28 16:58:30 -05:00 |
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util_rfifo
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fifo- monitor status signals
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2014-06-25 12:15:13 -04:00 |
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util_sync_reset
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util_sync_reset: Fix polarity of the sync_resetn signal
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2014-03-25 13:03:12 +01:00 |
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util_wfifo
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wfifo: read only if ready is asserted
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2014-10-31 13:05:17 -04:00 |
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