Istvan Csomortani f0027faf88 adi_jesd204: Add support of 16 lanes		2021-07-27 10:28:48 +03:00
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Makefile	Makefile: Update makefiles	2019-08-26 16:58:01 +03:00
axi_jesd204_tx.v	jesd204: Increase Tx version to 1.06.a	2021-02-05 15:24:15 +02:00
axi_jesd204_tx_constr.sdc	jesd204: Intel: NP12 support	2021-02-05 15:24:15 +02:00
axi_jesd204_tx_constr.xdc	jesd204: Xilinx: NP=12 support	2021-02-05 15:24:15 +02:00
axi_jesd204_tx_hw.tcl	adi_jesd204: Add support of 16 lanes	2021-07-27 10:28:48 +03:00
axi_jesd204_tx_ip.tcl	jesd204: Expose core synthesis parameters through registers	2021-02-05 15:24:15 +02:00
axi_jesd204_tx_ooc.ttcl	jesd204/axi_jesd204: Complete clock definitions in out of context mode	2021-05-14 15:39:40 +03:00
jesd204_up_tx.v	jesd204: Add support for 8-byte JESD204B, frame alignment character insertion/replacement	2021-02-05 15:24:15 +02:00