39 lines
1.1 KiB
Tcl
39 lines
1.1 KiB
Tcl
# ip
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source ../scripts/adi_env.tcl
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source $ad_hdl_dir/library/scripts/adi_ip.tcl
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adi_init_bd_tcl
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adi_ip_create axi_ad9144
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adi_ip_files axi_ad9144 [list \
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"axi_ad9144.v" \
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"bd/bd.tcl" ]
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adi_ip_properties axi_ad9144
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adi_auto_fill_bd_tcl
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adi_ip_bd axi_ad9144 "bd/bd.tcl"
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adi_ip_add_core_dependencies { \
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analog.com:user:ad_ip_jesd204_tpl_dac:1.0 \
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}
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adi_set_ports_dependency "dac_valid_2" "QUAD_OR_DUAL_N == 1"
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adi_set_ports_dependency "dac_valid_3" "QUAD_OR_DUAL_N == 1"
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adi_set_ports_dependency "dac_enable_2" "QUAD_OR_DUAL_N == 1"
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adi_set_ports_dependency "dac_enable_3" "QUAD_OR_DUAL_N == 1"
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adi_set_ports_dependency "dac_ddata_2" "QUAD_OR_DUAL_N == 1" "0"
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adi_set_ports_dependency "dac_ddata_3" "QUAD_OR_DUAL_N == 1" "0"
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set_property driver_value 0 [ipx::get_ports *dunf* -of_objects [ipx::current_core]]
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set_property driver_value 0 [ipx::get_ports *tx_ready* -of_objects [ipx::current_core]]
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ipx::infer_bus_interface tx_clk xilinx.com:signal:clock_rtl:1.0 [ipx::current_core]
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adi_add_auto_fpga_spec_params
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ipx::create_xgui_files [ipx::current_core]
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ipx::save_core [ipx::current_core]
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