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pluto_hdl_adi/library/axi_pulse_gen
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Istvan Csomortani 0e7b38ebcf axi_pulse_gen: Initial commit 
The axi_pulse_gen is a generic PWM generator, which can be configured
through an AXI Memory Mapped interface.

The current register map look like follows:

  0x00 - VERSION
  0x04 - ID
  0x08 - SCRATCH
  0x0C - IDENTIFICATION - 0x504c5347 which stands for 'PLSG' in ASCII
  0x10 - CONFIGURATION - contains reset and load bits
  0x14 - PULSE_PERIOD
  0x18 - PULSE_WIDTH

Also update all the other modules, which instantiate the util_pulse_gen.
 		2019-03-20 08:21:22 +00:00
..
Makefile axi_pulse_gen: Initial commit 2019-03-20 08:21:22 +00:00
axi_pulse_gen.v axi_pulse_gen: Initial commit 2019-03-20 08:21:22 +00:00
axi_pulse_gen_constr.ttcl axi_pulse_gen: Initial commit 2019-03-20 08:21:22 +00:00
axi_pulse_gen_ip.tcl axi_pulse_gen: Initial commit 2019-03-20 08:21:22 +00:00
axi_pulse_gen_regmap.v axi_pulse_gen: Initial commit 2019-03-20 08:21:22 +00:00