Adrian Costina c32b4b02f3 sync_bits: Change I/O names of wires "in" and "out" for VHDL users		2019-04-23 18:03:23 +03:00
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Makefile	Move Altera IP core dependency tracking to library Makefiles	2018-04-11 15:09:54 +03:00
spi_engine_offload.v	sync_bits: Change I/O names of wires "in" and "out" for VHDL users	2019-04-23 18:03:23 +03:00
spi_engine_offload_ip.tcl	Create CDC helper library	2017-05-23 11:16:07 +02:00