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Lars-Peter Clausen 495d2f3056 axi_dmac: Propagate awlen/arlen width through the core 
Depending on whether the core is configured for AXI4 or AXI3 mode the width
of the awlen/arlen signal is either 8 or 4 bit. At the moment this is only
considered in top-level module and all other modules use 8 bit internally.
This causes warnings about truncated signals in AXI3 mode, to resolve this
forward the width of the signal through the core.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
 		2017-03-30 17:19:38 +02:00
..
altera altera/common- add asymmetric fifo 2017-03-01 15:35:04 -05:00
axi_ad6676 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad7616 axi_ad7616: Set up default driver value for input ports 2017-02-07 12:29:21 +02:00
axi_ad9122 library/ad9122- constraints clean-up 2017-02-02 14:21:41 -05:00
axi_ad9144 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9152 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9162 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9234 updated makefiles 2016-12-09 23:06:41 +02:00
axi_ad9250 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9265 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9361 fmcomms2: Update constraints file paths 2017-03-30 16:16:02 +03:00
axi_ad9371 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9434 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9467 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9625 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9643 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9652 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9671 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9680 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9684 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9739a library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_ad9963 library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_adc_decimate constraints: Update constraints 2017-02-24 13:43:32 +02:00
axi_adc_trigger axi_adc_trigger: Added triggered register 2017-02-27 14:26:19 +02:00
axi_clkgen updated makefiles 2016-12-09 23:06:41 +02:00
axi_dac_interpolate constraints: Update constraints 2017-02-24 13:43:32 +02:00
axi_dmac axi_dmac: Propagate awlen/arlen width through the core 2017-03-30 17:19:38 +02:00
axi_generic_adc updated makefiles 2016-12-09 23:06:41 +02:00
axi_gpreg constraints: Update constraints 2017-02-24 13:43:32 +02:00
axi_hdmi_rx library: Update scripts with new constraints 2017-03-30 16:16:02 +03:00
axi_hdmi_tx fmcomms2: Update constraints file paths 2017-03-30 16:16:02 +03:00
axi_i2s_adi scripts/adi_ip: Fix adi_ip_infer_interfaces process 2017-01-12 12:15:33 +02:00
axi_intr_monitor updated makefiles 2016-12-09 23:06:41 +02:00
axi_logic_analyzer axi_logic_analyzer: Added an additional delay to the trigger, to be similar with the analog path 2017-03-14 18:00:42 +02:00
axi_mc_controller updated makefiles 2016-12-09 23:06:41 +02:00
axi_mc_current_monitor updated makefiles 2016-12-09 23:06:41 +02:00
axi_mc_speed updated makefiles 2016-12-09 23:06:41 +02:00
axi_spdif_rx scripts/adi_ip: Fix adi_ip_infer_interfaces process 2017-01-12 12:15:33 +02:00
axi_spdif_tx scripts/adi_ip: Fix adi_ip_infer_interfaces process 2017-01-12 12:15:33 +02:00
axi_usb_fx3 axi_usb_fx3: Fixed clock domain association 2017-02-14 11:48:07 +02:00
cn0363 updated makefiles 2016-12-09 23:06:41 +02:00
common ad_axi_ip_constr.xdc: Delete file 2017-03-30 16:16:02 +03:00
cordic_demod updated makefiles 2016-12-09 23:06:41 +02:00
interfaces interfaces- remove channel based pll reset 2016-11-22 11:34:29 -05:00
prcfg library/prcfg : Split data bus to channels 2015-10-13 11:36:45 +03:00
scripts adi_ip: Set up SCOPE_TO_REF for xdc and save the core 2017-03-29 18:40:24 +03:00
spi_engine spi_engine: Set up default driver value for input ports 2017-02-07 12:30:46 +02:00
util_adcfifo adcfifo- asym_mem primitive changes 2017-03-01 15:55:56 -05:00
util_axis_fifo updated makefiles 2016-12-09 23:06:41 +02:00
util_axis_resize updated makefiles 2016-12-09 23:06:41 +02:00
util_bsplit updated makefiles 2016-12-09 23:06:41 +02:00
util_ccat updated makefiles 2016-12-09 23:06:41 +02:00
util_clkdiv util_clkdiv: Keep as valid only settings common for 7Series and Ultrascale 2017-01-18 11:56:24 +02:00
util_cpack updated makefiles 2016-12-09 23:06:41 +02:00
util_dacfifo util_dacfifo: Define constraints for bypass 2017-03-07 16:14:46 +02:00
util_extract util_extract: Initial commit 2017-01-31 16:26:05 +02:00
util_fir_dec util_fir_dec: Changed output rounding mode to Symmetric rounding to Zero 2017-03-09 16:33:17 +02:00
util_fir_int util_fir_int: Shifted data so that the amplitude at the output of the filter is the same with the input 2017-03-08 14:29:26 +02:00
util_gmii_to_rgmii updated makefiles 2016-12-09 23:06:41 +02:00
util_i2c_mixer updated makefiles 2016-12-09 23:06:41 +02:00
util_mfifo updated makefiles 2016-12-09 23:06:41 +02:00
util_pmod_adc updated makefiles 2016-12-09 23:06:41 +02:00
util_pmod_fmeter updated makefiles 2016-12-09 23:06:41 +02:00
util_rfifo constraints: Update constraints 2017-02-24 13:43:32 +02:00
util_sigma_delta_spi updated makefiles 2016-12-09 23:06:41 +02:00
util_tdd_sync util_sync_constr: Preserve 1bit CDCs with ASYNC_REG true 2017-02-23 11:44:01 +02:00
util_upack updated makefiles 2016-12-09 23:06:41 +02:00
util_var_fifo util_var_fifo: Initial commit 2017-01-31 16:26:45 +02:00
util_wfifo arradio/c5soc- critical warnings fix 2017-03-20 12:14:13 -04:00
xilinx restructure: Move xilinx specific constraints to /library/xilinx/common/ 2017-03-30 16:16:02 +03:00
Makefile make updates 2017-03-20 16:05:18 -04:00