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intel
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library:axi_adrv9001: Initial version
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2020-08-24 17:49:12 +03:00 |
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Makefile
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makefile: Regenerate make files
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2020-10-20 12:51:10 +03:00 |
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adrv9001_aligner4.v
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library:axi_adrv9001: Initial version
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2020-08-24 17:49:12 +03:00 |
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adrv9001_aligner8.v
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library:axi_adrv9001: Initial version
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2020-08-24 17:49:12 +03:00 |
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adrv9001_pack.v
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library:axi_adrv9001: Initial version
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2020-08-24 17:49:12 +03:00 |
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adrv9001_rx.v
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axi_adrv9001: Use global clocks for divided down clock
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2021-01-26 15:22:41 +02:00 |
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adrv9001_rx_link.v
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library:axi_adrv9001: Initial version
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2020-08-24 17:49:12 +03:00 |
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adrv9001_tx.v
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axi_adrv9001: Use global clocks for divided down clock
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2021-01-26 15:22:41 +02:00 |
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adrv9001_tx_link.v
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library:axi_adrv9001: Initial version
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2020-08-24 17:49:12 +03:00 |
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axi_adrv9001.v
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axi_adrv9001: Add opt-in synthesis parameters
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2021-01-26 15:22:41 +02:00 |
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axi_adrv9001_constr.sdc
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axi_adrv9001: Double sync control lines between interface 1 and 2
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2021-03-04 11:13:10 +02:00 |
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axi_adrv9001_constr.xdc
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axi_adrv9001: Double sync control lines between interface 1 and 2
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2021-03-04 11:13:10 +02:00 |
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axi_adrv9001_core.v
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axi_adrv9001: Double sync control lines between interface 1 and 2
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2021-03-04 11:13:10 +02:00 |
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axi_adrv9001_hw.tcl
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Update Quartus Prime version from 19.3.0 to 20.1.0
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2021-03-08 11:29:33 +02:00 |
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axi_adrv9001_if.v
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library:axi_adrv9001: Initial version
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2020-08-24 17:49:12 +03:00 |
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axi_adrv9001_ip.tcl
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axi_adrv9001: Add TDD support
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2021-01-20 13:00:01 +02:00 |
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axi_adrv9001_rx.v
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axi_adrv9001: Add opt-in synthesis parameters
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2021-01-26 15:22:41 +02:00 |
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axi_adrv9001_rx_channel.v
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axi_adrv9001:axi_adrv9001_rx_channel: fix ramp signal checking
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2021-01-26 15:22:41 +02:00 |
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axi_adrv9001_tdd.v
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axi_adrv9001: Add TDD support
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2021-01-20 13:00:01 +02:00 |
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axi_adrv9001_tx.v
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axi_adrv9001: Fix channel 3 for Tx1 in DMA mode
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2021-03-04 11:13:10 +02:00 |
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axi_adrv9001_tx_channel.v
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library:axi_adrv9001: Initial version
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2020-08-24 17:49:12 +03:00 |
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