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Istvan Csomortani 4bcf338e9b adi_project.tcl : Fix message severity 
When message severity is set to 'error', need to do it quiet, other way the tool will stop after synthesis, complaining for previous errors.
 		2014-11-13 16:33:47 +02:00
library axi_fifo2f: common interface with fifo2s 2014-11-12 15:15:32 -05:00
projects adi_project.tcl : Fix message severity 2014-11-13 16:33:47 +02:00
.gitignore a5soc: increase pipeline for qsys 2014-05-04 10:38:53 -04:00
LICENSE Update LICENSE 2014-03-11 15:06:52 -04:00
README.md Add a link to EngineerZone 2014-04-15 10:25:18 +03:00

README.md

hdl

Analog Devices HDL libraries and projects

First time users, it is highly recommended to go through our HDL user guide at the following url:

http://wiki.analog.com/resources/fpga/docs/hdl

For support please visit our FPGA Reference Designs Support Community on EngineerZone:

http://ez.analog.com/community/fpga