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Istvan Csomortani 4e60f15e7f axi_clkgen: Add a parameter to control the clock source options 
Add a parameter to the control the clock source option of the MMCM. If
the MMCM has only one clock source the CLKSEL pin will be tied to VDD.

The previous version added a redundant path between the CLKSEL port and
register map.
 		2018-04-11 15:09:54 +03:00
..
altera avl_dacfifo: Fix avl_address generation 2017-12-15 12:17:47 +00:00
axi_ad5766 axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad6676 axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad7616 axi_ad7616: Add missing port to instantiation 2018-04-11 15:09:54 +03:00
axi_ad9122 axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad9144 avl_adxcvr: Perform octet order swap 2017-08-03 17:57:58 +02:00
axi_ad9152 axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad9162 axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad9250 Remove unused Q_OR_I_N parameter from JESD204 ADC cores 2018-02-20 16:33:16 +01:00
axi_ad9265 axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad9361 a10soc: Connect AXI register reset 2018-04-11 15:09:54 +03:00
axi_ad9371 axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad9379 axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad9434 axi_ad9434: Make adc_enable controllable from the channel register map 2018-04-11 15:09:54 +03:00
axi_ad9467 axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad9625 axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad9671 axi_ad9671: Fix typo 2017-08-07 10:54:45 +01:00
axi_ad9680 axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad9684 axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad9739a axi_*: Fix instantiation of up_[adc|dac]_[common|channel] 2018-04-11 15:09:54 +03:00
axi_ad9963 axi_ad9963: Fix port dependency definition 2018-04-11 15:09:54 +03:00
axi_adc_decimate constraints: up_xfer_cntrl and up_xfer_status have its own constraints 2018-04-11 15:09:54 +03:00
axi_adc_trigger constraints: up_xfer_cntrl and up_xfer_status have its own constraints 2018-04-11 15:09:54 +03:00
axi_clkgen axi_clkgen: Add a parameter to control the clock source options 2018-04-11 15:09:54 +03:00
axi_dac_interpolate constraints: up_xfer_cntrl and up_xfer_status have its own constraints 2018-04-11 15:09:54 +03:00
axi_dmac axi_dmac: fix synthesis warnings 2018-04-11 15:09:54 +03:00
axi_fmcadc5_sync axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
axi_generic_adc library: Match s_axi_{awaddr,araddr} signal width to peripheral memory map size 2017-08-01 15:21:25 +02:00
axi_gpreg library: Match s_axi_{awaddr,araddr} signal width to peripheral memory map size 2017-08-01 15:21:25 +02:00
axi_hdmi_rx axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
axi_hdmi_tx axi_hdmi_tx: Updated .sdc constraints 2018-04-11 15:09:54 +03:00
axi_i2s_adi library: Update 2017-11-15 17:08:45 +02:00
axi_intr_monitor library: Match s_axi_{awaddr,araddr} signal width to peripheral memory map size 2017-08-01 15:21:25 +02:00
axi_logic_analyzer constraints: up_xfer_cntrl and up_xfer_status have its own constraints 2018-04-11 15:09:54 +03:00
axi_mc_controller axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
axi_mc_current_monitor axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
axi_mc_speed axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
axi_rd_wr_combiner license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
axi_spdif_rx license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
axi_spdif_tx license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
axi_usb_fx3 library: Match s_axi_{awaddr,araddr} signal width to peripheral memory map size 2017-08-01 15:21:25 +02:00
cn0363 license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
common up_delay_cntrl: Fix synthesis warnings, no functional changes 2018-04-11 15:09:54 +03:00
cordic_demod license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
interfaces interface: Update the transceiver interfaces 2017-09-25 18:02:04 +01:00
jesd204 axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
prcfg license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
scripts scripts:adi_ip: Update web address format 2018-04-11 15:09:54 +03:00
spi_engine spi_engine:axi_spi_engine: Add missing port to instantiations 2018-04-11 15:09:54 +03:00
util_adcfifo axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
util_axis_fifo Make: Use $(MAKE) for recursive make commands 2018-03-07 07:40:19 +00:00
util_axis_resize util_axis_resize: Coding style updates 2017-08-07 11:23:57 +03:00
util_axis_upscale util_axis_upscale: Initial commit 2018-04-11 15:09:54 +03:00
util_bsplit Remove executable flag from non-executable files 2017-07-28 17:56:07 +02:00
util_cdc util_cdc: Add helper function for creating constraints for the CDC blocks 2017-08-21 11:05:16 +02:00
util_cic jesd204-sub-ip- no top files 2017-06-01 15:48:48 -04:00
util_clkdiv axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
util_cpack util_[c|u]pack_dsf: clear syntehsis warnings 2018-04-11 15:09:54 +03:00
util_dacfifo Make: Update makefiles 2017-11-20 14:27:39 +02:00
util_delay util_delay: Initial commit 2017-05-25 15:12:10 +03:00
util_extract axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
util_fir_dec license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
util_fir_int util_fir_int: Fix valid assignment 2017-06-06 17:53:41 +03:00
util_gmii_to_rgmii axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
util_i2c_mixer license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
util_mfifo axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
util_pulse_gen util_pulse_gen: Add Makefile 2017-04-27 11:28:25 +03:00
util_rfifo util_[w|r]fifo: Reduce synthesis warnings 2018-04-11 15:09:54 +03:00
util_sigma_delta_spi license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
util_tdd_sync axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
util_upack util_[c|u]pack_dsf: clear syntehsis warnings 2018-04-11 15:09:54 +03:00
util_var_fifo axi_*: Infer clock and reset signals of an IP 2018-04-11 15:09:54 +03:00
util_wfifo util_[w|r]fifo: Reduce synthesis warnings 2018-04-11 15:09:54 +03:00
xilinx util_adxcvr: Don't show reset ports for disabled lanes 2018-04-11 15:09:54 +03:00
Makefile util_axis_upscale: Initial commit 2018-04-11 15:09:54 +03:00