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In some cases, the 'core_ilas_config_data' registers will be infered as FDRE, instead of FDSE. Therefor a max delay definition, which are using the S pin as its endpoint, it can become invalid, nonexistent. Generalize the path, using the register itself as endpoint. |
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README.md
HDL Reference Designs
Analog Devices Inc. HDL libraries and projects
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