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Adrian Costina b7ca17f02b scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects 2017-06-07 12:06:50 +03:00
..
ccbob_cmos scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects 2017-06-07 12:06:50 +03:00
ccbob_lvds scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects 2017-06-07 12:06:50 +03:00
ccbox_lvds scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects 2017-06-07 12:06:50 +03:00
ccfmc_lvds scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects 2017-06-07 12:06:50 +03:00
ccpci_lvds scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects 2017-06-07 12:06:50 +03:00
ccusb_lvds scripts: Change adi_project_create to adi_project_xilinx for creating xilinx projects 2017-06-07 12:06:50 +03:00
common adrv9361z7035: Rename pzsdr2 to adrv9361z7035 2017-05-25 17:17:54 +03:00
Makefile adrv9361z7035: Rename pzsdr2 to adrv9361z7035 2017-05-25 17:17:54 +03:00
README.md adrv9361z7035: Update README 2017-05-25 17:47:19 +03:00

README.md

ADRV1CRR SDR SOM

This folder contains the ADRV1CRR SOM projects for each of the carrier boards.

Board Design Files

Directory/File Description
common/adrv9361z7035_bd.tcl ADRV1CRR SOM module board design file.
common/ccbob_bd.tcl carrier, break out board design file.
common/ccfmc_bd.tcl carrier, fmc board design file.
common/ccpci_bd.tcl carrier, pci-e board design file.
common/ccusb_bd.tcl carrier, usb board design file.

FMC & BOB carrier designs includes loopback daughtercards for connectivity testing.

Board Constraint Files

Directory/File Description
common/adrv9361z7035_constr.xdc ADRV1CRR SOM base constraints file.
common/adrv9361z7035_constr_cmos.xdc ADRV1CRR SOM CMOS mode constraints file.
common/adrv9361z7035_constr_lvds.xdc ADRV1CRR SOM LVDS mode constraints file.
common/ccbob_constr.xdc carrier, break out board constraints file.
common/ccfmc_constr.xdc carrier, fmc board constraints file.
common/ccpci_constr.xdc carrier, pci-e board constraints file.
common/ccusb_constr.xdc carrier, usb board constraints file.

FMC & BRK carrier designs includes loopback daughtercards for connectivity testing.

Building, Generating Bit Files

[adrv9361z7035] cd ccbob_cmos

[adrv9361z7035/ccbob_cmos] make

The make in each carrier directory builds the corresponding project. The above example builds ADRV1CRR-BOB hardware bit files in CMOS mode.

Documentation