20 lines
630 B
Tcl
20 lines
630 B
Tcl
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source ../../scripts/adi_env.tcl
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source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
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source $ad_hdl_dir/projects/scripts/adi_board.tcl
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adi_project ad9208_dual_ebz_vcu118
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adi_project_files ad9208_dual_ebz_vcu118 [list \
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"system_top.v" \
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"system_constr.xdc"\
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"$ad_hdl_dir/library/common/ad_iobuf.v" \
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"$ad_hdl_dir/projects/daq3/common/daq3_spi.v" \
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"$ad_hdl_dir/projects/common/vcu118/vcu118_system_constr.xdc" ]
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## To improve timing in DDR4 MIG
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#set_property strategy Performance_Retiming [get_runs impl_1]
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set_property strategy Performance_SpreadSLLs [get_runs impl_1]
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adi_project_run ad9208_dual_ebz_vcu118
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