pluto_hdl_adi/projects/daq3/a10gx
Sergiu Arpadi 3241924d14 sysid_intel: Added sysid to intel projects 2020-09-11 15:46:06 +03:00
..
Makefile all: Rename altera to intel 2019-06-29 06:53:51 +03:00
system_constr.sdc a10gx: Delete input/output delay definitions 2020-08-11 10:14:18 +03:00
system_project.tcl daq3: Delete redundant timing constraint 2020-08-11 10:14:18 +03:00
system_qsys.tcl sysid_intel: Added sysid to intel projects 2020-09-11 15:46:06 +03:00
system_top.v sysid_intel: Added sysid to intel projects 2020-09-11 15:46:06 +03:00