ATofan ee56db8d50 FMCOMMS2: Modified FCLK2 to 125 MHz, and xdc file ... tcl: FCLK2 was modified from 100 MHz to 125 MHz. xdc: rx_clk period constraint was redefined from 8ns (125 MHz) to 4ns (250 MHz)		2014-03-14 16:27:56 +02:00
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system_bd.tcl	fmcomms2: added	2014-03-11 20:04:26 -04:00
system_constr.xdc	FMCOMMS2: Modified FCLK2 to 125 MHz, and xdc file	2014-03-14 16:27:56 +02:00
system_project.tcl	fmcomms2: added	2014-03-11 20:04:26 -04:00
system_top.v	fmcomms2: added	2014-03-11 20:04:26 -04:00