pluto_hdl_adi/projects/common/zc702
Laszlo Nagy 0261eade0c zynq:all: fix SPI clock constraint
According to data sheets the EMIO SPI controller maximum frequency is
just 25MHz. Constrain the SPI clock accordingly.
2019-08-09 16:39:56 +03:00
..
zc702_system_bd.tcl system_id: deployed ip 2019-08-06 16:53:11 +03:00
zc702_system_constr.xdc zynq:all: fix SPI clock constraint 2019-08-09 16:39:56 +03:00