94 lines
3.8 KiB
Tcl
94 lines
3.8 KiB
Tcl
# ip
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source ../scripts/adi_env.tcl
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source $ad_hdl_dir/library/scripts/adi_ip.tcl
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adi_ip_create util_gtlb
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adi_ip_files util_gtlb [list \
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"$ad_hdl_dir/library/common/up_xfer_status.v" \
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"util_gtlb_constr.xdc" \
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"util_gtlb.v" ]
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adi_ip_properties_lite util_gtlb
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adi_ip_constraints util_gtlb [list \
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"util_gtlb_constr.xdc" ]
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ipx::remove_all_bus_interface [ipx::current_core]
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adi_if_infer_bus ADI:user:if_gt_qpll master gt_qpll_0 [list \
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"qpll_rst qpll0_rst "\
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"qpll_ref_clk qpll0_ref_clk_in "]
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for {set n 0} {$n < 1} {incr n} {
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adi_if_infer_bus ADI:user:if_gt_pll master gt_pll_${n} [list \
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"cpll_rst_m cpll_rst_m_${n} "\
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"cpll_ref_clk_in cpll_ref_clk_in_${n} "]
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adi_if_infer_bus xilinx.com:display_jesd204:jesd204_rx_bus slave gt_rx_ip_${n} [list \
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"rxcharisk rx_gt_charisk_${n} "\
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"rxdisperr rx_gt_disperr_${n} "\
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"rxnotintable rx_gt_notintable_${n} "\
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"rxdata rx_gt_data_${n} "]
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adi_if_infer_bus ADI:user:if_gt_rx master gt_rx_${n} [list \
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"rx_p rx_${n}_p "\
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"rx_n rx_${n}_n "\
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"rx_rst rx_rst_${n} "\
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"rx_rst_m rx_rst_m_${n} "\
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"rx_pll_rst rx_pll_rst_${n} "\
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"rx_gt_rst rx_gt_rst_${n} "\
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"rx_gt_rst_m rx_gt_rst_m_${n} "\
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"rx_pll_locked rx_pll_locked_${n} "\
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"rx_pll_locked_m rx_pll_locked_m_${n} "\
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"rx_user_ready rx_user_ready_${n} "\
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"rx_user_ready_m rx_user_ready_m_${n} "\
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"rx_rst_done rx_rst_done_${n} "\
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"rx_rst_done_m rx_rst_done_m_${n} "\
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"rx_out_clk rx_out_clk_${n} "\
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"rx_clk rx_clk_${n} "\
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"rx_sysref rx_sysref_${n} "\
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"rx_sync rx_sync_${n} "\
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"rx_sof rx_sof_${n} "\
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"rx_data rx_data_${n} "\
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"rx_ip_rst rx_ip_rst_${n} "\
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"rx_ip_sof rx_ip_sof_${n} "\
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"rx_ip_data rx_ip_data_${n} "\
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"rx_ip_sysref rx_ip_sysref_${n} "\
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"rx_ip_sync rx_ip_sync_${n} "\
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"rx_ip_rst_done rx_ip_rst_done_${n} "]
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adi_if_infer_bus xilinx.com:display_jesd204:jesd204_tx_bus master gt_tx_ip_${n} [list \
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"txcharisk tx_gt_charisk_${n} "\
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"txdata tx_gt_data_${n} "]
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adi_if_infer_bus ADI:user:if_gt_tx master gt_tx_${n} [list \
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"tx_p tx_${n}_p "\
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"tx_n tx_${n}_n "\
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"tx_rst tx_rst_${n} "\
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"tx_rst_m tx_rst_m_${n} "\
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"tx_pll_rst tx_pll_rst_${n} "\
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"tx_gt_rst tx_gt_rst_${n} "\
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"tx_gt_rst_m tx_gt_rst_m_${n} "\
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"tx_pll_locked tx_pll_locked_${n} "\
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"tx_pll_locked_m tx_pll_locked_m_${n} "\
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"tx_user_ready tx_user_ready_${n} "\
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"tx_user_ready_m tx_user_ready_m_${n} "\
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"tx_rst_done tx_rst_done_${n} "\
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"tx_rst_done_m tx_rst_done_m_${n} "\
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"tx_out_clk tx_out_clk_${n} "\
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"tx_clk tx_clk_${n} "\
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"tx_sysref tx_sysref_${n} "\
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"tx_sync tx_sync_${n} "\
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"tx_data tx_data_${n} "\
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"tx_ip_rst tx_ip_rst_${n} "\
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"tx_ip_data tx_ip_data_${n} "\
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"tx_ip_sysref tx_ip_sysref_${n} "\
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"tx_ip_sync tx_ip_sync_${n} "\
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"tx_ip_rst_done tx_ip_rst_done_${n} "]
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}
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ipx::save_core [ipx::current_core]
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