44 lines
4.0 KiB
Tcl
Executable File
44 lines
4.0 KiB
Tcl
Executable File
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set_property CONFIG.PCW_PRESET_BANK0_VOLTAGE {LVCMOS 1.8V} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_PRESET_BANK1_VOLTAGE {LVCMOS 1.8V} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_PACKAGE_NAME {fbg676} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_GPIO_MIO_GPIO_ENABLE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_ENET0_PERIPHERAL_ENABLE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_ENET0_ENET0_IO {MIO 16 .. 27} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_ENET0_GRP_MDIO_ENABLE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_ENET1_PERIPHERAL_ENABLE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_ENET_RESET_SELECT {Separate reset pins} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_ENET0_RESET_ENABLE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_ENET0_RESET_IO {MIO 8} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_ENET1_RESET_ENABLE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_ENET1_RESET_IO {MIO 51} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_SD0_PERIPHERAL_ENABLE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_SD0_GRP_CD_ENABLE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_SD0_GRP_CD_IO {MIO 50} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_SDIO_PERIPHERAL_FREQMHZ {50} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UART1_PERIPHERAL_ENABLE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_USB0_PERIPHERAL_ENABLE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_USB0_RESET_ENABLE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_USB0_RESET_IO {MIO 7} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_QSPI_PERIPHERAL_ENABLE {1} [get_bd_cells sys_ps7]
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## DDR MT41K256M16 HA-125 (32M, 16bit, 8banks)
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set_property CONFIG.PCW_UIPARAM_DDR_PARTNO {MT41K256M16 RE-125} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_BUS_WIDTH {32 Bit} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_USE_INTERNAL_VREF {0} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_TRAIN_READ_GATE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_TRAIN_DATA_EYE {1} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0 {0.110} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1 {0.095} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2 {0.249} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3 {0.249} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY0 {0.202} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY1 {0.217} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY2 {0.216} [get_bd_cells sys_ps7]
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set_property CONFIG.PCW_UIPARAM_DDR_BOARD_DELAY3 {0.217} [get_bd_cells sys_ps7]
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