pluto_hdl_adi/library/altera/jesd204_phy
Adrian Costina 1b1edd1b03 jesd204: Added additional input registers to jesd204_soft_pcs_rx, when lane rate is over 10Gbps 2017-10-25 14:36:54 +01:00
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jesd204_phy_glue.v library: Add JESD204 PHY wrapper for Arria10 Native PHY 2017-08-21 11:20:57 +02:00
jesd204_phy_glue_hw.tcl altera: jesd204_phy: Fix indention issues 2017-08-21 13:57:55 +02:00
jesd204_phy_hw.tcl jesd204: Added additional input registers to jesd204_soft_pcs_rx, when lane rate is over 10Gbps 2017-10-25 14:36:54 +01:00