pluto_hdl_adi/projects/ad7616_sdz/zc706
Istvan Csomortani a74e2061e9 ad7616_sdz: BUSY is input for the FPGA 2016-02-03 14:12:00 +02:00
..
Makefile ad7616_sdz: Update Make file 2016-01-28 14:48:44 +02:00
parallel_if_constr.xdc ad7616_sdz: Add support for parallel interface 2016-01-28 12:38:22 +02:00
serial_if_constr.xdc ad7616_sdz: Update IO constraints 2015-12-14 15:34:56 +02:00
system_bd.tcl ad7616_sdz: Add project source files 2015-11-03 15:03:35 +02:00
system_project.tcl ad7616_sdz: Add support for parallel interface 2016-01-28 12:38:22 +02:00
system_top_pi.v ad7616_sdz: BUSY is input for the FPGA 2016-02-03 14:12:00 +02:00
system_top_si.v ad7616_sdz: BUSY is input for the FPGA 2016-02-03 14:12:00 +02:00