6895915076
Fix the reset of the dma_mem_waddr (write address register of the CDC FIFO on DMA's clock domain). This solves the occasional invalid read backs after multiple re-initialization of the PL_DDR_FIFO. |
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avl_dacfifo.v | ||
avl_dacfifo_byteenable_coder.v | ||
avl_dacfifo_byteenable_decoder.v | ||
avl_dacfifo_constr.sdc | ||
avl_dacfifo_hw.tcl | ||
avl_dacfifo_rd.v | ||
avl_dacfifo_wr.v | ||
util_dacfifo_bypass.v |