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Verilog-2001 style module parameter declaration is the preferred coding style for this repository. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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LICENSE | ||
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LICENSE_GPL2 | ||
LICENSE_LGPL | ||
Makefile | ||
README.md |
README.md
HDL Reference Designs
Analog Devices Inc. HDL libraries and projects
Branches
Each release has its own branch and master always synced with the latest release. To find out more information about the latest release please check the release notes. Every branch, which has dev in its name, is a development branch and should handle it accordingly.