pluto_hdl_adi/library/axi_ad9144
Lars-Peter Clausen de4fe30238 library: Match s_axi_{awaddr,araddr} signal width to peripheral memory map size
The external s_axi_{awaddr,araddr} signals that are connect to the core
have their width set according to the specified size of the register map.

If the s_axi_{awaddr,araddr} signal of the core is wider (as it currently
is for many cores) the MSBs of those signals are left unconnected, which
generates a warning.

To avoid this make sure that the signal width matches the declared register
map size.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-08-01 15:21:25 +02:00
..
Makefile Makefile: Update Makefiles for libraries 2017-03-30 18:33:22 +03:00
axi_ad9144.v library: Match s_axi_{awaddr,araddr} signal width to peripheral memory map size 2017-08-01 15:21:25 +02:00
axi_ad9144_channel.v license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
axi_ad9144_constr.xdc axi_ad9144: Added CDC and reset constraints 2015-04-23 10:19:43 +03:00
axi_ad9144_core.v license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
axi_ad9144_hw.tcl axi_ad9144: axi_ad9144_hw.tcl: Disable unused interfaces instead of not creating them 2017-08-01 15:21:02 +02:00
axi_ad9144_if.v license: Add some clarification to the header license 2017-05-31 18:18:56 +03:00
axi_ad9144_ip.tcl library: Delete all adi_ip_constraint process call 2017-04-06 12:36:47 +03:00