42 lines
1.6 KiB
Makefile
42 lines
1.6 KiB
Makefile
####################################################################################
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## Copyright 2018(c) Analog Devices, Inc.
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## Auto-generated, do not modify!
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####################################################################################
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LIBRARY_NAME := axi_jesd204_tx
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GENERIC_DEPS += ../../common/up_axi.v
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GENERIC_DEPS += axi_jesd204_tx.v
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GENERIC_DEPS += jesd204_up_tx.v
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XILINX_DEPS += axi_jesd204_tx_constr.xdc
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XILINX_DEPS += axi_jesd204_tx_ip.tcl
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XILINX_DEPS += axi_jesd204_tx_ooc.ttcl
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XILINX_DEPS += ../../jesd204/interfaces/jesd204_tx_cfg.xml
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XILINX_DEPS += ../../jesd204/interfaces/jesd204_tx_cfg_rtl.xml
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XILINX_DEPS += ../../jesd204/interfaces/jesd204_tx_ctrl.xml
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XILINX_DEPS += ../../jesd204/interfaces/jesd204_tx_ctrl_rtl.xml
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XILINX_DEPS += ../../jesd204/interfaces/jesd204_tx_event.xml
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XILINX_DEPS += ../../jesd204/interfaces/jesd204_tx_event_rtl.xml
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XILINX_DEPS += ../../jesd204/interfaces/jesd204_tx_ilas_config.xml
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XILINX_DEPS += ../../jesd204/interfaces/jesd204_tx_ilas_config_rtl.xml
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XILINX_DEPS += ../../jesd204/interfaces/jesd204_tx_status.xml
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XILINX_DEPS += ../../jesd204/interfaces/jesd204_tx_status_rtl.xml
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XILINX_LIB_DEPS += jesd204/axi_jesd204_common
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XILINX_INTERFACE_DEPS += jesd204/interfaces
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INTEL_DEPS += ../../common/up_clock_mon.v
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INTEL_DEPS += ../../intel/common/up_clock_mon_constr.sdc
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INTEL_DEPS += ../../util_cdc/sync_bits.v
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INTEL_DEPS += ../../util_cdc/sync_data.v
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INTEL_DEPS += ../../util_cdc/sync_event.v
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INTEL_DEPS += ../axi_jesd204_common/jesd204_up_common.v
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INTEL_DEPS += ../axi_jesd204_common/jesd204_up_sysref.v
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INTEL_DEPS += axi_jesd204_tx_constr.sdc
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INTEL_DEPS += axi_jesd204_tx_hw.tcl
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include ../../scripts/library.mk
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