6dbbe2f1ca
The "'b0" constant will be translate as a 32 bit width vector by ModelSim, and will throw a buswidth mismatch error. Tie the data_b bus to zero, using its width parameter. |
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|---|---|---|
| .. | ||
| alt_mem_asym | ||
| alt_mul | ||
| ad_cmos_clk.v | ||
| ad_cmos_in.v | ||
| ad_cmos_out.v | ||
| ad_cmos_out_core_c5.v | ||
| ad_dcfilter.v | ||
| ad_lvds_clk.v | ||
| ad_lvds_in.v | ||
| ad_lvds_out.v | ||
| ad_mem_asym.v | ||
| ad_mul.v | ||
| ad_serdes_clk.v | ||
| ad_serdes_in.v | ||
| ad_serdes_in_core_c5.v | ||
| ad_serdes_out.v | ||
| ad_serdes_out_core_c5.v | ||