Istvan Csomortani 1d4b92190a fmcomms2/zc702: Fix Warning[Synth 8-2611] ... In Verilog-2001 standard, redeclaration of an output port as a wire is not allowed.		2017-04-19 13:54:03 +03:00
..
a10gx	Makefiles: Change MMU enabling parameter for altera designs from MMU to NIOS2_MMU	2017-04-18 10:57:16 +03:00
ac701	all: Update verilog files to verilog-2001	2017-04-13 11:59:55 +03:00
common	all: Update verilog files to verilog-2001	2017-04-13 11:59:55 +03:00
kc705	all: Update verilog files to verilog-2001	2017-04-13 11:59:55 +03:00
mitx045	all: Update verilog files to verilog-2001	2017-04-13 11:59:55 +03:00
vc707	all: Update verilog files to verilog-2001	2017-04-13 11:59:55 +03:00
zc702	fmcomms2/zc702: Fix Warning[Synth 8-2611]	2017-04-19 13:54:03 +03:00
zc706	all: Update verilog files to verilog-2001	2017-04-13 11:59:55 +03:00
zc706pr	all: Update verilog files to verilog-2001	2017-04-13 11:59:55 +03:00
zcu102	make updates	2017-03-20 16:05:18 -04:00
zed	all: Update verilog files to verilog-2001	2017-04-13 11:59:55 +03:00
Makefile	hdlmake.pl- updates	2016-12-01 13:52:11 -05:00