pluto_hdl_adi/projects/fmcadc2/vc707
Adrian Costina 9cd0378003 fmcadc2: Added clock constraint for the ADC path 2016-01-22 15:44:04 +02:00
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Makefile Makefiles: Updated Makefiles 2015-10-23 10:44:27 +03:00
system_bd.tcl fmcadc2_vc707: Increase the BRAM FIFO size to its maximum: it can store 1M samples. 2015-04-23 18:00:00 +03:00
system_constr.xdc fmcadc2: Added clock constraint for the ADC path 2016-01-22 15:44:04 +02:00
system_project.tcl fmcadc2/vc707: 2014.4 updates 2015-03-26 15:07:15 -04:00
system_top.v iobuf: do is a system verilog keyword 2015-05-21 14:06:17 -04:00