51 lines
1.8 KiB
Tcl
51 lines
1.8 KiB
Tcl
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# sys bram (use only when dma is not capable of keeping up).
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# generic fifo interface - existence is oblivious to software.
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proc p_sys_dmafifo {p_name m_name adc_data_width dma_addr_width} {
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global ad_hdl_dir
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set p_instance [get_bd_cells $p_name]
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set c_instance [current_bd_instance .]
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current_bd_instance $p_instance
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set m_instance [create_bd_cell -type hier $m_name]
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current_bd_instance $m_instance
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create_bd_pin -dir I adc_rst
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create_bd_pin -dir I -type clk adc_clk
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create_bd_pin -dir I adc_wr
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create_bd_pin -dir I -from [expr ($adc_data_width-1)] -to 0 adc_wdata
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create_bd_pin -dir O adc_wovf
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create_bd_pin -dir I -type clk dma_clk
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create_bd_pin -dir O dma_wr
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create_bd_pin -dir O -from 63 -to 0 dma_wdata
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create_bd_pin -dir I dma_wready
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create_bd_pin -dir I dma_xfer_req
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create_bd_pin -dir O -from 3 -to 0 dma_xfer_status
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set axi_fifo2f [create_bd_cell -type ip -vlnv analog.com:user:axi_fifo2f:1.0 axi_fifo2f]
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set_property -dict [list CONFIG.ADC_DATA_WIDTH $adc_data_width] $axi_fifo2f
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set_property -dict [list CONFIG.DMA_DATA_WIDTH {64}] $axi_fifo2f
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set_property -dict [list CONFIG.DMA_READY_ENABLE {1}] $axi_fifo2f
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set_property -dict [list CONFIG.DMA_ADDR_WIDTH $dma_addr_width] $axi_fifo2f
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ad_connect adc_rst axi_fifo2f/adc_rst
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ad_connect adc_clk axi_fifo2f/adc_clk
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ad_connect adc_wr axi_fifo2f/adc_wr
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ad_connect adc_wdata axi_fifo2f/adc_wdata
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ad_connect adc_wovf axi_fifo2f/adc_wovf
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ad_connect dma_clk axi_fifo2f/dma_clk
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ad_connect dma_wr axi_fifo2f/dma_wr
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ad_connect dma_wdata axi_fifo2f/dma_wdata
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ad_connect dma_wready axi_fifo2f/dma_wready
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ad_connect dma_xfer_req axi_fifo2f/dma_xfer_req
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ad_connect dma_xfer_status axi_fifo2f/dma_xfer_status
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current_bd_instance $c_instance
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}
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