pluto_hdl_adi/projects/common
Istvan Csomortani e3ea51ade3 avl_dacfifo: Refactor the fifo
+ Build both the read and write logic around an FSM
 + Consistent naming of registers and wires
 + Add support for burst lenghts higher than one, current burst lenght
is 64
 + Fix all the bugs, and make it work (first bring up with
adrv9371x/a10soc)
2017-10-31 14:30:06 +00:00
..
a10gx a10gx: Force all used tiles to high speed, in order to improve timing 2017-10-04 16:16:00 +01:00
a10soc avl_dacfifo: Refactor the fifo 2017-10-31 14:30:06 +00:00
ac701 ac701_common/adv7511: Update IP instantiations 2017-04-21 13:16:25 +03:00
altera altera- 2017-r1 16.1.2 2017-05-30 12:21:27 -04:00
c5soc Remove executable flag from non-executable files 2017-07-28 17:56:07 +02:00
kc705 kc705: Fix ethernet address span 2017-06-30 14:23:01 +03:00
kcu105
microzed common/microzed: Enable PS CLK1 = 200MHz 2017-09-25 15:16:58 +03:00
mitx045 Remove executable flag from non-executable files 2017-07-28 17:56:07 +02:00
vc707
xilinx
zc702 projects/zc702- free pmod gpio for customization 2017-08-09 14:06:26 -04:00
zc706 plddr3_dacfifo_bd: Increase the AXI burst length to max 2017-07-06 10:15:06 +01:00
zcu102 common/zcu102: Fix ps8 ref clock 0 frequency assignament 2017-08-22 15:37:59 +03:00
zed common: zed/zc702/zc706/mitx045: audio_clkgen: Disable phase alignment 2017-04-20 18:12:24 +02:00
Makefile