pluto_hdl_adi/projects/common
Istvan Csomortani 79b6ba29ce all: Rename altera to intel 2019-06-29 06:53:51 +03:00
..
a10gx a10gx: Optimise the base design 2019-06-04 11:28:37 +03:00
a10soc whitespace: Delete all trailing white spaces 2019-06-07 10:20:15 +03:00
ac701 base: Add system_processor_rst for all the global clocks 2019-06-11 18:13:06 +03:00
c5soc Remove executable flag from non-executable files 2017-07-28 17:56:07 +02:00
de10 DE10: Initial commit 2018-04-11 15:09:54 +03:00
intel all: Rename altera to intel 2019-06-29 06:53:51 +03:00
kc705 base: Add system_processor_rst for all the global clocks 2019-06-11 18:13:06 +03:00
kcu105 base: Add system_processor_rst for all the global clocks 2019-06-11 18:13:06 +03:00
microzed base: Add system_processor_rst for all the global clocks 2019-06-11 18:13:06 +03:00
vc707 block_design: Updates with new reset net variables 2019-06-11 18:13:06 +03:00
vcu118 base: Add system_processor_rst for all the global clocks 2019-06-11 18:13:06 +03:00
xilinx adcfifo/dacfifo: fix alignments 2019-01-23 14:45:45 +02:00
zc702 base: Add system_processor_rst for all the global clocks 2019-06-11 18:13:06 +03:00
zc706 block_design: Updates with new reset net variables 2019-06-11 18:13:06 +03:00
zcu102 base: Add system_processor_rst for all the global clocks 2019-06-11 18:13:06 +03:00
zed base: Add system_processor_rst for all the global clocks 2019-06-11 18:13:06 +03:00