f647dd4c0a
Some designs choose to swap the positive and negative side of the of the JESD204 lanes. One reason for this would be because it can simplify the PCB layout. The polarity is in most cases also only applied to a subset of the used lanes. Add support for this to the util_adxcvr module. This done by adding new parameter to the modules that allows to specify a per lane polarity inversion. Each bit in the parameter corresponds to one lane. If the bit is set the polarity is inverted for his lane. E.g. setting the parameter to 0xc will invert the 3rd and 4th lane. The setting is forwarded to the Xilinx transceiver for the corresponding lane. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> |
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| .. | ||
| axi_adcfifo | ||
| axi_adxcvr | ||
| axi_dacfifo | ||
| axi_xcvrlb | ||
| common | ||
| util_adxcvr | ||