pluto_hdl_adi/projects/ad7606x_fmc
alin724 7da9827782 ad7606x_fmc: Fix up_cpack2 module's SAMPLE_DATA_WIDTH parameter 2023-03-29 21:33:33 +03:00
..
common ad7606x_fmc: Fix up_cpack2 module's SAMPLE_DATA_WIDTH parameter 2023-03-29 21:33:33 +03:00
zed ad7606x: Fix system_top module's gpio instances and add missing adc_serpar,_refsel pins 2023-03-08 13:06:03 +02:00
Makefile library & projects: Update Makefiles 2023-01-27 11:54:05 +02:00
Readme.md ad7606x_fmc: Initial commit 2023-01-12 17:38:14 +02:00

Readme.md

AD7606X-FMC HDL Project

Here are some pointers to help you:

Building, Generating Bit Files

IMPORTANT: Set AD7606X device model, ADC Read Mode option and external clock option

How to use over-writable parameters from the environment:

hdl/projects/ad7606x_fmc/zed> make DEV_CONFIG=0 SIMPLE_STATUS_CRC=0
DEV_CONFIG  - Defines the device which will be used: 0 - AD7606B, 1 - AD7606C-16, 2 - AD7606C-18.
SIMPLE_STATUS_CRC - Defines the ADC Read Mode option: 0 - Simple, 1 - STATUS, 2 - CRC, 3 - CRC_STATUS.
EXT_CLK - Defines the external clock option for the ADC clock: 0 - No, 1 - Yes.