pluto_hdl_adi/projects/ad_fmclidar1_ebz/zc706
Istvan Csomortani 03bec4b49c ad_fmclidar1_ebz: Interchange SYSREF and DEV_CLK ports location
In ZCU102 LA01_CC_P|N are connected to regional clock, but in order to
receive a device clock properly we have to use pin which is connected
to a  global clock buffer. Luckily SYSREF is connected to global clock
pin; swap to port to receive the device clock correctly.

Also, swap the ports in both ZC706 and A10SOC carriers.
2019-10-17 09:59:23 +03:00
..
Makefile Makefile: Update makefiles 2019-08-26 16:58:01 +03:00
system_bd.tcl ad_fmclidar1_ebz: Move afe_iic definition to system_bd.tcl 2019-10-17 09:59:23 +03:00
system_constr.xdc ad_fmclidar1_ebz: Interchange SYSREF and DEV_CLK ports location 2019-10-17 09:59:23 +03:00
system_project.tcl ad_fmclidar1_ebz: Initial commit 2019-08-08 14:26:07 +03:00
system_top.v axi_laser_driver: TIA's are controlled individually in manual mode 2019-08-08 14:26:07 +03:00