Lars-Peter Clausen da28ee3cce axi_ad9361: xilinx LVDS interface: Restore previous feedback clock polarity ... Commit ff50963c7f ("axi_ad9361- altera/xilinx reconcile- may be broken- do not use") inverted the polarity of the TX feedback clock. This exposed some issues in the existing drivers which can cause the interface tuning to fail randomly under certain conditions. To keep backwards compatibility with existing drivers restore the previous behavior. A separate fix will be applied to the drivers that resolves the issue that has been exposed by the polarity inversion. So that interface calibration works reliably under all conditions. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>		2018-01-19 18:17:50 +01:00
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axi_ad9361_cmos_if.v	ad9361/sw- current sw requires clock edge swap	2017-07-31 14:48:25 -04:00
axi_ad9361_lvds_if.v	axi_ad9361: xilinx LVDS interface: Restore previous feedback clock polarity	2018-01-19 18:17:50 +01:00