Lars-Peter Clausen bb0021a926 common: zed/zc702/zc706/mitx045: audio_clkgen: Disable phase alignment ... There is no need for the audio clock to be phase aligned to its source clock. When phase alignment is disabled the MMCM uses an internal feedback path without requiring external resources, so disable it. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>		2017-04-20 18:12:24 +02:00
..
a5gt	fmcjesdadc1/a5gt- hard placement of ddr hr/qr registers	2017-02-17 15:21:33 -05:00
a5gte	Makefiles: Change MMU enabling parameter for altera designs from MMU to NIOS2_MMU	2017-04-18 10:57:16 +03:00
a5soc	a5soc- add ddr3 location assignments	2017-03-22 10:12:34 -04:00
a10gx	altera srf files do not work	2017-03-22 09:25:50 -04:00
a10soc	adrv9371x/altera- gpio equivalency fix	2017-03-27 16:37:55 -04:00
ac701	common/ac701: Connect axi_ddr_cntrl/device_temp_i to GND	2016-12-09 13:54:39 +02:00
altera	altera srf files do not work	2017-03-22 09:25:50 -04:00
c5soc	arradio/c5soc- remove qsys files	2017-03-20 15:56:07 -04:00
kc705	daq2/all - warnings fix	2016-08-17 10:36:00 -04:00
kcu105	kcu105: ip automatic version update	2017-04-18 11:59:54 +03:00
microzed	microzed: ip automatic version update	2017-04-14 17:24:24 +03:00
mitx045	common: zed/zc702/zc706/mitx045: audio_clkgen: Disable phase alignment	2017-04-20 18:12:24 +02:00
vc707	Ip automatic version update: common/board	2017-04-12 19:03:16 +03:00
xilinx	xilinx- ad-ip-instance & ad-ip-parameter	2017-04-06 13:04:19 -04:00
zc702	common: zed/zc702/zc706/mitx045: audio_clkgen: Disable phase alignment	2017-04-20 18:12:24 +02:00
zc706	common: zed/zc702/zc706/mitx045: audio_clkgen: Disable phase alignment	2017-04-20 18:12:24 +02:00
zcu102	zcu102/*- actual clock == desired clock	2017-02-06 12:53:47 -05:00
zed	common: zed/zc702/zc706/mitx045: audio_clkgen: Disable phase alignment	2017-04-20 18:12:24 +02:00
Makefile	Makefiles: Updated Makefiles	2015-10-23 10:44:27 +03:00