pluto_hdl_adi/projects/m2k/zed
Lars-Peter Clausen 0ffbe50163 m2k: zed: Run video DMA at higher clock rate
For the M2K standalone version we run the interface clock at a lower rate
to reduce the power consumption. While this is not necessary on the ZED
board we also run the interface at a lower rate for consistency.

Currently the video DMA on the ZED board uses the interface clock for the
data path as well. This is now too slow to support 1080p@60Hz so move it
over to a faster clock.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
2017-04-19 16:29:09 +02:00
..
Makefile m2k: Reduce AXI interconnect utilization 2017-04-18 12:17:39 +02:00
system_bd.tcl m2k: zed: Run video DMA at higher clock rate 2017-04-19 16:29:09 +02:00
system_constr.xdc m2k: Connect logic_analyzer path to clk_out instead of clk 2017-04-18 12:17:39 +02:00
system_project.tcl remove processing order (no clock def dependency) 2017-02-22 16:02:08 -05:00
system_top.v m2k: zed, cleaned up some warnings 2017-04-18 17:17:11 +03:00