29 lines
1.6 KiB
Plaintext
29 lines
1.6 KiB
Plaintext
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set_property ASYNC_REG TRUE \
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[get_cells -hier *_xfer_req_m*] \
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[get_cells -hier *_xfer_last_m*] \
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[get_cells -hier *dac_xfer_out*] \
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[get_cells -hier *dac_bypass_*] \
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[get_cells -hier *dma_bypass_*]
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set_false_path -to [get_cells -hier -filter {name =~ *_xfer_req_m_reg[0]* && IS_SEQUENTIAL}]
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set_false_path -to [get_cells -hier -filter {name =~ *_xfer_last_m_reg[0]* && IS_SEQUENTIAL}]
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set_false_path -to [get_cells -hier -filter {name =~ *dac_xfer_out_m1* && IS_SEQUENTIAL}]
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set_false_path -to [get_cells -hier -filter {name =~ *_bypass_m1* && IS_SEQUENTIAL}]
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set_false_path -to [get_cells -hier -filter {name =~ *dma_rst_m1* && IS_SEQUENTIAL}]
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set_false_path -from [get_cells -hier -filter {name =~ *dma_* && IS_SEQUENTIAL}] \
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-to [get_cells -hier -filter {name =~ *axi_*_m* && IS_SEQUENTIAL}]
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set_false_path -from [get_cells -hier -filter {name =~ *axi_* && IS_SEQUENTIAL}] \
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-to [get_cells -hier -filter {name =~ *dma_*_m* && IS_SEQUENTIAL}]
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set_false_path -from [get_cells -hier -filter {name =~ *dac_* && IS_SEQUENTIAL}] \
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-to [get_cells -hier -filter {name =~ *axi_*_m* && IS_SEQUENTIAL}]
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set_false_path -from [get_cells -hier -filter {name =~ *axi_* && IS_SEQUENTIAL}] \
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-to [get_cells -hier -filter {name =~ *dac_*_m* && IS_SEQUENTIAL}]
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set_false_path -from [get_cells -hier -filter {name =~ *dac_* && IS_SEQUENTIAL}] \
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-to [get_cells -hier -filter {name =~ *dma_*_m* && IS_SEQUENTIAL}]
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set_false_path -from [get_cells -hier -filter {name =~ *dma_* && IS_SEQUENTIAL}] \
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-to [get_cells -hier -filter {name =~ *dac_*_m* && IS_SEQUENTIAL}]
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